B69000 Asiliant Technologies, B69000 Datasheet - Page 271

• Manufacturer Part Number: B69000
• Manufacturer: Asiliant Technologies

Specifications of B69000

• Lead Free Status / Rohs Status: Supplier Unconfirmed

16-16
MR20
read/write at I/O address 3D3h with index at address 3D2h set to 20h
default = 00h
7
6
5
4
3
2
1-0
&+,36
Vert. Auto-
Playback
Enable
center
7
Playback Vertical Auto-Centering Enable
Playback Width Source
Playback Pointer Select 1
CPU Double Buffer Flag
Playback Pointer Select 2
Double Buffer Trigger
Reserved
69000 Databook
Playback Control 3 Register
Playback
0: Allow software to employ a delay to properly center the playback window vertically. This
is done usually via bit 4 of the Pixel Pipeline Configuration Register 1 (XR81).
1: Activate a hardware-based auto-centering mechanism.
0: Uses MR28 for Playback width
1: Uses MR34 for Playback width
0: The pointer to the location in the frame buffer from which frames/fields of video data are
played back is selected by bit 4 of this register.
1: The pointer to the location in the frame buffer from which frames/fields of video data are
played back is controlled by bit 3 of this register.
0: Playback memory address PTR1
1: Playback memory address PTR2
0: The pointer to the location in the frame buffer from which frames/fields of video data are
played back is selected by bit 4 of this register.
1: The pointer to the location in the frame buffer from which frames/fields of video data are
played back toggles between the addresses indicated by PTR1 and PTR2 after each frame/
field captured.
0: Retains old PTR.
1: Takes new PTR on next VSYNC if bit 5 is set to 1.
Source
Width
0
0
5
1
1
1
1
6
Bit
0
1
4
0
0
1
1
3
X
X
0
1
0
1
Playback
Pointer
Selects playback memory pointer address 1
Selects playback memory pointer address 2
Selects playback memory pointer address 1
Pointer to the location from which frames/fields of data
are read toggles between addresses indicated by
PTR1and PTR2 after each frame/field captured
Selects playback memory pointer address 2
Pointer to the location from which frames/fields of data
are read toggles between addresses indicated by
PTR1and PTR2 after each frame/field captured
Select
5
Subject to Change Without Notice
CPU Double
Buffer Flag
Multimedia Registers
Playback Pointer Select
4
Playback
Select 2
Pointer
3
Double
Trigger
Buffer
2
Revision 1.3 8/31/98
1
Reserved
0