SAA7146AH NXP Semiconductors, SAA7146AH Datasheet - Page 53

• Manufacturer Part Number: SAA7146AH
• Manufacturer: NXP Semiconductors

Specifications of SAA7146AH

• Lead Free Status / Rohs Status: Compliant

Philips Semiconductors
Table 51 Video timing reference codes
Notes
1. F = logic 0 during field 1 and logic 1 during field 2.
2. V = logic 0 elsewhere and logic 1 during field blanking.
3. H = logic 0 in SAV and logic 1 in EAV.
4. P
Bits P
(SAA7146A) this arrangement permits one-bit errors to be corrected. If two-bit errors or up to four-bit errors occur, i. e.
depending on uncoded protection bits, the circuit processes direct on the coded values. In this case the protection bits
are ignored.
SAV and EAV are only decoded and removed from the signal stream (substituted with neighbouring first or last active
video sample), if chosen this way. However, ‘single’ qualified codes of ‘00’ and/or ‘FF’ in the data stream, remain in the
data stream and are processed as data.
2004 Aug 25
handbook, full pagewidth
First
Second
Third
Fourth
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
D1_x (7 to 0)
D1_x (7 to 0)
0
0
, P
, P
BYTE
PXQ_x
PXQ_x
1
1
, P
, P
LLC
2
2
and P
and P
3
3
: protection bits (see Table 52).
, have states dependent on the states of the bits F, V and H as shown in Table 52. At the receiver
1
0
0
1
7 (MSB)
Y
Fig.10 Timing of PXQ_x for CCIR 656 at the D1_x port.
1
0
0
F
(1)
6
FFH
Cr
1
0
0
V
(2)
00H
Y
5
00H
53
1
0
0
H
(3)
BIT NUMBER
4
SAV
1
0
0
P
Cb
3
(4)
3
FFH
1
0
0
P
2
(4)
00H
2
Y
00H
1
0
0
P
1
Product specification
(4)
SAA7146A
1
EAV
Cr
MHB052
1
0
0
P
0 (LSB)
0
(4)