SAA7146AH NXP Semiconductors, SAA7146AH Datasheet - Page 125

SAA7146AH

Manufacturer Part Number
SAA7146AH
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAA7146AH

Lead Free Status / Rohs Status
Compliant

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Philips Semiconductors
8
The SAA7146A has built-in logic and 5 dedicated pins to
support boundary scan testing which allows board testing
without special hardware (nails). The SAA7146A follows
the “IEEE Std. 1149.1 - Standard Test Access Port and
Boundary-Scan Architecture” set by the Joint Test Action
Group (JTAG) chaired by Philips.
The 5 special pins are Test Mode Select (TMS), Test
Clock (TCK), Test Reset (TRST_N), Test Data Input (TDI)
and Test Data Output (TDO).
2004 Aug 25
FC
100
104
108
10C
110
114
118
11C
120
124
128
12C
130
134
138
13C
140
144
148
180-1BC
1C0-1FC
OFFSET
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
(HEX)
BOUNDARY SCAN TEST
MC1
MC2
RPS_ADDR0
RPS_ADDR1
ISR
PSR
SSR
EC1R
EC2R
PCI_VDP1
PCI_VDP2
PCI_VDP3
PCI_ADP1
PCI_ADP2
PCI_ADP3
PCI_ADP4
PCI_DDP
LEVEL_REP
FB_BUFFER1
FB_BUFFER2
audio time slot registers 1
audio time slot registers 2
NAME
RW
RW
RW
RW
RW
R
R
R
R
R
R
R
R
R
R
R
R
R
RW
RW
W
W
TYPE
no
no
no
no
no
no
no
no
no
no
no
no
no
no
no
no
no
no
no
no
no
no
RAM
125
00000100
0000077F
00000000
00000000
00000000
undefined
undefined
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
no read back
no read back
AFTER RESET
The Built-in Self Test (BST) functions BYPASS, EXTEST,
SAMPLE, CLAMP and IDCODE are all supported
(see Table 116). Details about the JTAG BST-TEST can
be found in specification “IEEE Std. 1149.1 - Standard
Test Access Port and Boundary-Scan Architecture” . A file
containing the detailed Boundary Scan Description
Language (BSDL) description of the SAA7146A is
available on request.
READ VALUE
immediate access
immediate access
CORRESPONDING UPLOAD BIT
Product specification
SAA7146A

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