MC68EC040RC25 Freescale Semiconductor, MC68EC040RC25 Datasheet - Page 33

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MC68EC040RC25

Manufacturer Part Number
MC68EC040RC25
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68EC040RC25

Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
179
Package Type
PGA
Lead Free Status / Rohs Status
Supplier Unconfirmed

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1-12
#<xxx> or #<data>
IC, DC, IC/DC
{offset:width}
FPm, FPn
MMUSR
B, W, L
SCALE
<fmt>
MSW
LSW
MSB
SIZE
CCR
DFC
FPcr
SFC
+ inf
– inf
LSB
ccc
PC
SR
bd
d n
od
Rc
( )
[ ]
D
P
S
X
k
Positive Infinity
Operand Data Format: Byte (B), Word (W), Long (L), Single (S), Double (D), Extended (X), or
Packed (P).
Specifies a signed integer data type (twos complement) of byte, word, or long word.
Double-precision real data format (64 bits).
A twos complement signed integer (–64 to +17) specifying a number’s format to be stored in
the packed decimal format.
Packed BCD real data format (96 bits, 12 bytes).
Single-precision real data format (32 bits).
Extended-precision real data format (96 bits, 16 bits unused).
Negative Infinity
Immediate data following the instruction word(s).
Identifies an indirect address in a register.
Identifies an indirect address in memory.
Base Displacement
Index into the MC68881/MC68882 Constant ROM
Displacement Value, n Bits Wide (example: d 16 is a 16-bit displacement).
Least Significant Bit
Least Significant Word
Most Significant Bit
Most Significant Word
Outer Displacement
A scale factor (1, 2, 4, or 8, for no-word, word, long-word, or quad-word scaling, respectively).
The index register’s size (W for word, L for long word).
Bit field selection.
Condition Code Register (lower byte of status register)
Destination Function Code Register
Any Floating-Point System Control Register (FPCR, FPSR, or FPIAR)
Any Floating-Point Data Register specified as the source or destination, respectively.
Instruction, Data, or Both Caches
MMU Status Register
Program Counter
Any Non Floating-Point Control Register
Source Function Code Register
Status Register
Table 1-3. Notational Conventions (Continued)
Freescale Semiconductor, Inc.
For More Information On This Product,
M68040 USER’S MANUAL
Go to: www.freescale.com
Subfields and Qualifiers
Data Format And Type
Register Names
MOTOROLA

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