GC80960RD66 Intel, GC80960RD66 Datasheet - Page 50

• Manufacturer Part Number: GC80960RD66
• Manufacturer: Intel

Specifications of GC80960RD66

• Family Name: i960 RX
• Device Core: 80960
• Device Core Size: 32b
• Frequency (max): 66MHz
• Supply Voltage 1 (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Operating Temp Range: 0C to 95C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 352
• Package Type: HLBGA
• Lead Free Status / Rohs Status: Not Compliant

Intel
Electrical Specifictions
4.4.1
Table 23.
4.4.2
Table 24.
Table 25.
50
®
i960
®
RX I/O Processor at 3.3 Volts
Relative Output Timings
Relative Output Timings
Memory Controller Relative Output Timings
Fast Page Mode Non-interleaved DRAM Output Timings
Fast Page Mode Interleaved DRAM Output Timings (Sheet 1 of 2)
T
T
T
T
T
T
T
NOTES:
T
T
T
NOTES:
T
T
T
T
T
T
NOTES:
Symbol
1. Signal generated on the rising edge of an internally generated 2XCLK which corresponds to the center of
2. Output switching between V
1. Guaranteed by design. May not be 100% tested.
2. See
3. See
4. Outputs precharged to V
1. Signal generated on the rising edge of an internally generated 2XCLK which corresponds to the center of
2. Output switching between V
Symbol
Symbol
OV12
OV13
OV14
OV15
OV16
OV17
OV18
LXL
LXA
DXD
OV6
OV7
OV8
OV9
OV10
OV11
an S_CLK period. For testing purposes, the signal is specified relative to the rising edge of S_CLK with
the 0.5Tc period offset.
an S_CLK period. For testing purposes, the signal is specified relative to the rising edge of S_CLK with
the 0.5Tc period offset.
Figure 13, “T
Figure 14, “DT/R# and DEN# Timings Waveform” on page
RAS3:0# Rising and Falling edge Output Valid Delay
CAS7:0# Rising Edge Output Valid Delay
CAS7:0# Falling Edge Output Valid Delay
MA11:0 Output Valid Delay-Row Address
MA11:0 Output Valid Delay-Column Address
DWE1:0# Rising and Falling Edge Output Valid Delay
DALE1:0 Initial Falling Edge Output Valid Delay
ALE Width
Address Hold from ALE Inactive
DT/R# Valid to DEN# Active
RAS3:0# Rising and Falling edge Output Valid
Delay
CAS7:0# Rising Edge Output Valid Delay
CAS7:0# Falling Edge Output Valid Delay
MA11:0 Output Valid Delay-Row Address
MA11:0 Output Valid Delay-Column Address
DWE1:0# Rising and Falling edge Output Valid
Delay
LXL
Parameter
and T
CC5
Description
Description
LXA
CC3
CC3
maximium.
Relative Timings Waveform” on page
maximium and V
maximium and V
0.5T
0.5T
0.5T
Min
SS
SS
C
C
C
.
.
-3
-3
-3
Max
0.5Tc+2
0.5Tc+2
Min
0.5Tc+2
0.5Tc+2
57.
2
2
2
2
Min
2
2
2
2
2
Units
ns
ns
ns
57.
0.5Tc+10
0.5Tc+10
0.5Tc+8
0.5Tc+8
(1,2,4)
Equal Loading (1,2,4)
Equal Loading (1,3,4)
Max
Max
10
11
10
10
9
8
11
9
8
Notes
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Datasheet
2
2
1,2
1,2
2
2
2
2
2
1,2
1,2
2
2
Notes
Notes