W77C32F-40 Nuvoton Technology Corporation of America, W77C32F-40 Datasheet - Page 60

• Manufacturer Part Number: W77C32F-40
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W77C32F-40

• Lead Free Status / Rohs Status: Supplier Unconfirmed

15. SERIAL PORT
Serial port in the W77C32 is a full duplex port. The W77C32 provides the user with additional features
such as the Frame Error Detection and the Automatic Address Recognition. The serial ports are
capable of synchronous as well as asynchronous communication. In Synchronous mode the W77C32
generates the clock and operates in a half duplex mode. In the asynchronous mode, full duplex
operation is available. This means that it can simultaneously transmit and receive data. The transmit
register and the receive buffer are both addressed as SBUF Special Function Register. However any
write to SBUF will be to the transmit register, while a read from SBUF will be from the receive buffer
register. The serial port can operate in four different modes as described below.
Mode 0
This mode provides synchronous communication with external devices. In this mode serial data is
transmitted and received on the RXD line. TXD is used to transmit the shift clock. The TxD clock is
provided by the W77C32 whether the device is transmitting or receiving. This mode is therefore a half
duplex mode of serial communication. In this mode, 8 bits are transmitted or received per frame. The
LSB is transmitted/received first. The baud rate is fixed at 1/12 or 1/4 of the oscillator frequency. This
baud rate is determined by the SM2 bit (SCON.5). When this bit is set to 0, then the serial port runs at
1/12 of the clock. When set to 1, the serial port runs at 1/4 of the clock. This additional facility of
programmable baud rate in mode 0 is the only difference between the standard 8051 and the
W77C32.
The functional block diagram is shown below. Data enters and leaves the Serial port on the RxD line.
The TxD line is used to output the shift clock. The shift clock is used to shift data into and out of the
W77C32 and the device at the other end of the line. Any instruction that causes a write to SBUF will
start the transmission. The shift clock will be activated and data will be shifted out on the RxD pin till all
8 bits are transmitted. If SM2 = 1, then the data on RxD will appear 1 clock period before the falling
edge of shift clock on TxD. The clock on TxD then remains low for 2 clock periods, and then goes high
again. If SM2 = 0, the data on RxD will appear 3 clock periods before the falling edge of shift clock on
TxD. The clock on TxD then remains low for 6 clock periods, and then goes high again. This ensures
that at the receiving end the data on RxD line can either be clocked on the rising edge of the shift
clock on TxD or latched when the TxD clock is low.
SM2
div. by 4
div. by 64
div. by 1024 osc/256
÷ 12
REN
Mode
Clock Source
RI
0
Iutput function
P3.0 Alternate
osc/1
osc/16
1
input
÷ 4
RXD
Write to
SBUF
TX START
TX CLOCK
RX
CLOCK
RX
START
CONTROLLER
SERIAL
LOAD SBUF
Figure 20. Serial Port Mode 0
Data Bus
RX SHIFT
Internal
TX SHIFT
CLOCK
SHIFT
TI
RI
Receive Shift Register
- 60 -
CLOCK
SIN
Transmit Shift Register
PAROUT
CLOCK
PARIN
LOAD
SOUT
SBUF
W77C32/W77C032
TXD
P3.1 Alternate
Output function
Serial Port Interrupt
RXD
P3.0 Alternate
Output Function
Read SBUF
SBUF
Data Bus
Internal