W77C32F-40 Nuvoton Technology Corporation of America, W77C32F-40 Datasheet - Page 41

• Manufacturer Part Number: W77C32F-40
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W77C32F-40

• Lead Free Status / Rohs Status: Supplier Unconfirmed

9.4 Wait State Control Signal
Either with the software using stretch value to change the required machine cycle of MOVX
instruction, the W77C32 provides another hardware signal WAIT to implement the wider duration of
external data access timing. This wait state control signal is the alternate function of P4.0 such that it
can only be invoked to 44-pin PLCC/QFP package type. The wait state control signal can be enabled
by setting WS (ROMMAP.7) bit. When enabled, the setting of stretch value decides the minimum
length of MOVX instruction cycle and the device will sample the WAIT pin at each C3 state before the
rising edge of read/write strobe signal during MOVX instruction. Once this signal being recongnized,
one more machine cycle (wait state cycle) will be inserted into next cycle. The inserted wait state
cycles are unlimited, so the MOVX instruction cycle will end in which the wait state control signal is
deactivated. Using wait state control signal allows a dynamically access timimg to a selected external
peripheral. The WS bit is accessed by the Timed Access Protection procedure.
PORT 0
PORT 2
CLK
ALE
PSEN
WR
MOVX Inst.
C1
Address
of Previous
Last Cycle
Instruction
A0-A7
C2
A15-A8
C3
MOVX Inst.
C4
D0-D7
Figure 10: Dada Memory Write with Stretch Value = 2
C1
Machine Cycle
Next Inst.
Address
A0-A7
C2
First
A15-A8
C3
Next Inst.
Read
C4
D0-D7
C1
MOVX Data
Machine Cycle
Address
A0-A7
C2
Second
MOVX instruction cycle
- 41 -
C3
C4
C1
Machine Cycle
C2
Publication Release Date: December 20, 2005
Third
A15-A8
C3
MOVX Data out
D0-D7
C4
C1
W77C32/W77C032
Machine Cycle
C2
Fourth
C3
C4
C1
Machine Cycle
Instruction
A0-A7
C2
Next
A15-A8
C3
C4
D0-D7
Revision A5