W77C32F-40 Nuvoton Technology Corporation of America, W77C32F-40 Datasheet - Page 14

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W77C32F-40

Manufacturer Part Number
W77C32F-40
Description
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of W77C32F-40

Lead Free Status / Rohs Status
Supplier Unconfirmed
IE1:
IT1:
IE0:
IT0:
Timer Mode Control
GATE: Gating control: When this bit is set, Timer/counter x is enabled only while INTx pin is high
C/ T :
M1, M0: Mode Select bits:
Timer 0 LSB
TL0.7-0: Timer 0 LSB
Interrupt 1 edge detect: Set by hardware when an edge/level is detected on INT1 . This bit is
cleared by hardware when the service routine is vectored to only if the interrupt was edge
triggered. Otherwise it follows the pin.
Interrupt 1 type control: Set/cleared by software to specify falling edge/ low level triggered
external inputs.
Interrupt 0 edge detect: Set by hardware when an edge/level is detected on INT0 . This bit is
cleared by hardware when the service routine is vectored to only if the interrupt was edge
triggered. Otherwise it follows the pin.
Interrupt 0 type control: Set/cleared by software to specify falling edge/ low level triggered
external inputs.
and TRx control bit is set. When cleared, Timer x is enabled whenever TRx control bit is set.
Timer or Counter Select: When cleared, the timer is incremented by internal clocks. When set,
the timer counts high-to-low edges of the Tx pin.
M1
1
0
0
1
Mnemonic: TL0
Mnemonic: TMOD
M0
0
1
0
1
Bit:
Bit:
Mode
Mode 0: 8-bits with 5-bit prescale.
Mode 1: 18-bits, no prescale.
Mode 2: 8-bits with auto-reload from THx
Mode 3: (Timer 0) TL0 is an 8-bit timer/counter controlled by the
GATE
TL0.7
standard Timer 0 control bits. TH0 is a 8-bit timer only controlled by
Timer 1 control bits. (Timer 1) Timer/counter is stopped.
7
7
TL0.6
C/ T
6
TIMER1
6
TL0.5
- 14 -
M1
5
5
TL0.4
M0
4
4
GATE
TL0.3
3
3
W77C32/W77C032
Address: 8Ah
Address: 89h
TL0.2
C/ T
2
2
TIMER0
TL0.1
M1
1
1
TL0.0
M0
0
0

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