ADSP-2171KST-133 Analog Devices Inc, ADSP-2171KST-133 Datasheet - Page 44

• Manufacturer Part Number: ADSP-2171KST-133
• Manufacturer: Analog Devices Inc

Specifications of ADSP-2171KST-133

• Device Core Size: 16b
• Architecture: Enhanced Harvard
• Format: Fixed Point
• Clock Freq (max): 33.33MHz
• Mips: 33
• Device Input Clock Speed: 33.33MHz
• Ram Size: 10KB
• Program Memory Size: 24KB
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 128
• Package Type: TQFP
• Lead Free Status / Rohs Status: Not Compliant

ADSP-2171/ADSP-2172/ADSP-2173
ADSP-2173
CAPACITIVE LOADING
Figures 35 and 36 show the capacitive loading characteristics of
the ADSP-2173.
Figure 35. Typical Output Rise Time vs. Load Capacitance,
C
Figure 36. Typical Output Valid Delay or Hold vs. Load
Capacitance, C
Temperature)
TEST CONDITIONS
Output Disable Time
Output pins are considered to be disabled when they have
stopped driving and started a transition from the measured out-
put high or low voltage to a high impedance state. The output
disable time (t
shown in the Output Enable/Disable diagram. The time is the
interval from when a reference signal reaches a high or low volt-
age level to when the output voltages have changed by 0.5 V
from the measured output high or low voltage. The decay time,
L
(at Maximum Ambient Operating Temperature)
NOMINAL
28
24
20
16
12
8
+14
+12
+10
+8
+4
+2
-2
DIS
L
) is the difference of t
(at Maximum Ambient Operating
25
25
50
50
V
DD
= 3.3 V
75
C
75
L
– pF
C
L
100
– pF
MEASURED
100
125
125
and t
150
150
DECAY
, as
–44–
t
rent load, i
following equation:
from which
is calculated. If multiple pins (such as the data bus) are dis-
abled, the measurement value is that of the last pin to stop
driving.
Output Enable Time
Output pins are considered to be enabled when that have made
a transition from a high-impedance state to when they start driv-
ing. The output enable time (t
reference signal reaches a high or low voltage level to when the
output has reached a specified high or low trip point, as shown
in the Output Enable/Disable diagram. If multiple pins (such as
the data bus) are enabled, the measurement value is that of the
first pin to start driving.
DECAY
REFERENCE
Figure 37. Voltage Reference Levels for AC Measure-
ments (Except Output Enable/Disable)
Figure 39. Equivalent Device Loading for AC Measure-
ments (Including All Fixtures)
OUTPUT
(MEASURED)
(MEASURED)
SIGNAL
, is dependent on the capacitative load, C
OUTPUT
V
INPUT
V
L
OL
OH
, on the output pin. It can be approximated by the
OUTPUT
Figure 38. Output Enable/Disable
t
PIN
MEASURED
TO
t
OUTPUT STOPS
DIS
DRIVING
t
DIS
50pF
t
DECAY
HIGH-IMPEDANCE STATE. TEST CONDITIONS CAUSE
THIS VOLTAGE LEVEL TO BE APPROXIMATELY 1.5V.
V
V
OH
OL
t
t
DECAY
MEASURED
(MEASURED) – 0.5V
(MEASURED) +0.5V
ENA
C
L
) is the interval from when a
• 0.5V
i
I
I
– t
L
OH
OL
DECAY
V
V
OUTPUT STARTS
DD
DD
2
2
1.0V
2.0V
DRIVING
L
t
ENA
, and the cur-
V
DD
2
V
(MEASURED)
V
(MEASURED)
OH
OL
REV. A