ADSP-2171KST-133 Analog Devices Inc, ADSP-2171KST-133 Datasheet - Page 33

• Manufacturer Part Number: ADSP-2171KST-133
• Manufacturer: Analog Devices Inc

Specifications of ADSP-2171KST-133

• Device Core Size: 16b
• Architecture: Enhanced Harvard
• Format: Fixed Point
• Clock Freq (max): 33.33MHz
• Mips: 33
• Device Input Clock Speed: 33.33MHz
• Ram Size: 10KB
• Program Memory Size: 24KB
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 128
• Package Type: TQFP
• Lead Free Status / Rohs Status: Not Compliant

REV. A
ADSP-2173
Parameter
Clock Signals
t
a frequency equal to half the instruction rate; a 10.0 MHz input
clock (which is equivalent to 100 ns) yields a 50 ns processor cycle
(equivalent to 20 MHz). t
period should be substituted for all relevant timing parameters
to obtain specification value.
Example: t
Timing Requirement:
t
t
t
Switching Characteristic:
t
t
t
Control Signals
Timing Requirement:
t
NOTE
1
CK
CKI
CKIL
CKIH
CKL
CKH
CKOH
RSP
Applies after power-up sequence is complete. Internal phase lock loop requires no more than 2000 CLKIN cycles assuming stable CLKIN (not including crystal
oscillator start-up time).
is defined as 0.5 t
CKH
= 0.5t
CLKIN Period
CLKIN Width Low
CLKIN Width High
CLKOUT Width Low
CLKOUT Width High
CLKIN High to CLKOUT High
RESET Width Low
CKI.
CK
– 10 ns = 0.5 (50 ns) – 10 ns = 15 ns.
The ADSP-2173 uses an input clock with
CK
CLKOUT
values within the range of 0.5 t
CLKIN
Figure 24. Clock Signals
CKI
t
CKIL
t
CKI
–33–
t
CKL
ADSP-2171/ADSP-2172/ADSP-2173
Min
100
20
20
0.5t
0.5t
0
5t
CK
CK
CK
1
– 10
– 10
t
t
CKOH
CKH
t
CKIH
Max
160
25
ns
ns
ns
ns
ns
ns
ns
Unit