ADSP-2171KST-133 Analog Devices Inc, ADSP-2171KST-133 Datasheet - Page 25
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ADSP-2171KST-133
Manufacturer Part Number
ADSP-2171KST-133
Description
Manufacturer
Analog Devices Inc
Datasheet
1.ADSP-2171KST-133.pdf
(52 pages)
Specifications of ADSP-2171KST-133
Device Core Size
16b
Architecture
Enhanced Harvard
Format
Fixed Point
Clock Freq (max)
33.33MHz
Mips
33
Device Input Clock Speed
33.33MHz
Ram Size
10KB
Program Memory Size
24KB
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
128
Package Type
TQFP
Lead Free Status / Rohs Status
Not Compliant
REV. A
ADSP-2171/ADSP-2172
Parameter
Host Interface Port
Separate Data and Address (HMD1 = 0)
Read Strobe and Write Strobe (HMD0 = 0)
Timing Requirement:
t
t
t
t
t
Switching Characteristic:
t
t
t
t
t
t
NOTES
1
2
3
4
5
HSU
HDSU
HWDH
HH
HRWP
HSHK
HKH
HDE
HDD
HRDH
HRDD
Start of Write = HWR Low and HSEL Low.
Start of Read = HRD Low and HSEL Low.
End of Write = HWR High or HSEL High.
End of Read = HRD High or HSEL High.
Read Pulse Width = HRD Low and HSEL Low, Write Pulse Width = HWR Low and HSEL Low.
Host Write Cycle
Host Read Cycle
HA2–0 Setup before Start of Write or Read
Data Setup before End of Write
Data Hold after End of Write
HA2–0 Hold after End of Write or Read
Read or Write Pulse Width
HACK Low after Start of Write or Read
HACK Hold after End of Write or Read
Data Enabled after Start of Read
Data Valid after Start of Read
Data Hold after End of Read
Data Disabled after End of Read
HD15–0
HA2–0
HD15–0
HACK
HSEL
HA2–0
HWR
HACK
HSEL
HRD
Figure 14. Host Interface Port (HMD1 = 0, HMD0 = 0)
t
t
t
HDD
t
HDE
HSU
5
HSU
4
3
2
t
HSHK
3
2
4
t
HSHK
t
ADDRESS
HRWP
ADDRESS
3, 4
1, 2
3, 4
t
HRWP
1, 2
t
HDSU
–25–
DATA
DATA
t
t
HRDH
HRDD
ADSP-2171/ADSP-2172/ADSP-2173
t
t
HKH
HH
t
HKH
t
HH
Min
5
5
3
3
20
0
0
0
0
t
HWDH
Max
15
15
18
7
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns