IDT82V3002APV IDT, Integrated Device Technology Inc, IDT82V3002APV Datasheet - Page 4

• Manufacturer Part Number: IDT82V3002APV
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V3002APV

• Function: Wan PLL
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Package Type: SSOP
• Pin Count: 56
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

LIST OF FIGURES
Figure - 1 Block Diagram .................................................................................................................................................. 2
Figure - 2 IDT82V3002A SSOP56 Package Pin Assignment........................................................................................... 6
Figure - 3 State Control Block......................................................................................................................................... 10
Figure - 4 State Control Diagram.................................................................................................................................... 11
Figure - 5 TIE Control Circuit Diagram ........................................................................................................................... 13
Figure - 6 Reference Switch with TIE Control Block Enabled......................................................................................... 13
Figure - 7 Reference Switch with TIE Control Block Disabled........................................................................................ 14
Figure - 8 DPLL Block Diagram ...................................................................................................................................... 15
Figure - 9 Clock Oscillator Circuit ................................................................................................................................... 16
Figure - 10 Power-Up Reset Circuit.................................................................................................................................. 16
Figure - 11 IDT82V3002A Power Decoupling Scheme .................................................................................................... 17
Figure - 12 Input to Output Timing (Normal Mode)........................................................................................................... 26
Figure - 13 Output Timing 1.............................................................................................................................................. 27
Figure - 14 Output Timing 2.............................................................................................................................................. 28
Figure - 15 Input Control Setup and Hold Timing ............................................................................................................. 28
October 15, 2008
List of Figures
4