LAXP2-17E-5QN208E Lattice, LAXP2-17E-5QN208E Datasheet - Page 73

• Manufacturer Part Number: LAXP2-17E-5QN208E
• Description: IC FPGA AUTO 17K LUTS 208-PQFP
• Manufacturer: Lattice

Specifications of LAXP2-17E-5QN208E

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
JTAG Port Timing Specifications
Figure 3-10. JTAG Port Timing Waveforms
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Timing v. A 0.12
MAX
BTCP
BTCPH
BTCPL
BTS
BTH
BTRF
BTCO
BTCODIS
BTCOEN
BTCRS
BTCRH
BUTCO
BTUODIS
BTUPOEN
Symbol
Data to be
Data to be
driven out
captured
from I/O
to I/O
TMS
TDO
TCK
TDI
TCK Clock Frequency
TCK [BSCAN] clock pulse width
TCK [BSCAN] clock pulse width high
TCK [BSCAN] clock pulse width low
TCK [BSCAN] setup time
TCK [BSCAN] hold time
TCK [BSCAN] rise/fall time
TAP controller falling edge of clock to valid output
TAP controller falling edge of clock to valid disable
TAP controller falling edge of clock to valid enable
BSCAN test capture register setup time
BSCAN test capture register hold time
BSCAN test update register, falling edge of clock to valid output
BSCAN test update register, falling edge of clock to valid disable
BSCAN test update register, falling edge of clock to valid enable
t
BTCPH
Over Recommended Operating Conditions
t
BTCOEN
t
BTUPOEN
t
BTCPL
Parameter
t
BTCRS
t
BTS
Data Captured
3-29
V
t
a
BTCRH
t
d i l
BTH
D
V
a
a
d i l
a t
D
a
t
a t
BTCO
t
BUTCO
DC and Switching Characteristics
LA-LatticeXP2 Family Data Sheet
t
BTCP
V
Min.
25
a
—
40
20
20
10
50
—
—
—
—
—
—
8
8
d i l
D
V
a
a
d i l
a t
D
t
BTCODIS
a
a t
Max.
t
10
10
10
25
25
25
BTUODIS
25
—
—
—
—
—
—
—
—
mV/ns
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns