LAXP2-17E-5QN208E Lattice, LAXP2-17E-5QN208E Datasheet - Page 50

• Manufacturer Part Number: LAXP2-17E-5QN208E
• Description: IC FPGA AUTO 17K LUTS 208-PQFP
• Manufacturer: Lattice

Specifications of LAXP2-17E-5QN208E

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
sysIO Recommended Operating Conditions
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
LVTTL33
PCI33
SSTL18_I
SSTL18_II
SSTL25_I
SSTL25_II
SSTL33_I
SSTL33_II
HSTL15_I
HSTL18_I
HSTL18_II
LVDS25
MLVDS25
LVPECL33
BLVDS25
RSDS
SSTL18D_I
SSTL18D_II
SSTL25D_ I
SSTL25D_II
SSTL33D_ I
SSTL33D_ II
HSTL15D_ I
HSTL18D_ I
HSTL18D_ II
1. Inputs on chip. Outputs are implemented with the addition of external resistors.
2. Input on this standard does not depend on the value of V
Standard
1, 2
2
2
1, 2
2
2
2
1
2
2
2
2
2
,
,
,
2
,
1, 2
2
2
2
2
2
2
2
2
,
2
2
2
,
,
2
,
3.135
2.375
1.425
3.135
3.135
2.375
3.135
1.425
2.375
2.375
3.135
2.375
2.375
2.375
3.135
1.425
Min.
1.71
1.14
1.71
1.71
1.71
1.71
Over Recommended Operating Conditions
V
Typ.
3.3
2.5
1.8
1.5
1.2
3.3
3.3
1.8
2.5
3.3
1.5
1.8
2.5
2.5
3.3
2.5
2.5
1.8
2.5
3.3
1.5
1.8
CCIO
CCIO
.
3-6
3.465
2.625
1.575
3.465
3.465
2.625
3.465
1.575
2.625
2.625
3.465
2.625
2.625
2.625
3.465
1.575
Max.
1.89
1.26
1.89
1.89
1.89
1.89
DC and Switching Characteristics
LA-LatticeXP2 Family Data Sheet
0.833
0.816
Min.
1.15
0.68
1.3
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
V
REF
Typ.
1.25
0.75
0.9
1.5
0.9
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(V)
0.969
Max.
1.35
1.08
1.7
0.9
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—