PI7C9X7954AFDE Pericom Semiconductor, PI7C9X7954AFDE Datasheet - Page 6

• Manufacturer Part Number: PI7C9X7954AFDE
• Description: IC PCIE-TO-UART BRIDGE 128LQFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C9X7954AFDE

• Applications: PCIe-to-Uart Bridge
• Interface: Advanced Configuration Power Interface (ACPI)
• Voltage - Supply: 1.8V, 3.3V
• Package / Case: 128-LQFP
• Mounting Type: Surface Mount
• Transmitter And Receiver Fifo Counter: Yes
• Package Type: LQFP
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.
8.
September 2009 – Revision 1.3
Pericom Semiconductor
7.1.
7.2.
8.1.
8.2.
8.3.
UART REGISTER DESCRIPTION..................................................................................................44
7.1.1.
7.1.2.
7.1.3.
7.1.4.
7.1.5.
7.1.6.
7.1.7.
7.1.8.
7.1.9.
7.1.10.
7.1.11.
7.1.12.
7.1.13.
7.2.1.
7.2.2.
7.2.3.
7.2.4.
7.2.5.
7.2.6.
7.2.7.
7.2.8.
7.2.9.
7.2.10.
7.2.11.
7.2.12.
7.2.13.
7.2.14.
7.2.15.
7.2.16.
7.2.17.
7.2.18.
7.2.19.
7.2.20.
7.2.21.
7.2.22.
7.2.23.
7.2.24.
7.2.25.
7.2.26.
7.2.27.
7.2.28.
7.2.29.
7.2.30.
7.2.31.
EEPROM INTERFACE .....................................................................................................................63
REGISTERS IN I/O MODE ..........................................................................................................44
R
AUTO MODE EERPOM ACCESS ...............................................................................................63
EEPROM MODE AT RESET ........................................................................................................63
EEPROM SPACE ADDRESS MAP AND DESCRIPTION ..........................................................63
EGISTERS IN
RECEIVE HOLDING REGISTER – OFFSET 00h ................................................................45
TRANSMIT HOLDING REGISTER – OFFSET 00h..............................................................45
INTERRUPT ENABLE REGISTER – OFFSET 01h ..............................................................45
INTERRUPT STATUS REGISTER – OFFSET 02h................................................................46
FIFO CONTROL REGISTER – OFFSET 02h .......................................................................46
LINE CONTROL REGISTER – OFFSET 03h .......................................................................46
MODEM CONTROL REGISTER – OFFSET 04h .................................................................47
LINE STATUS REGISTER – OFFSET 05h ............................................................................48
MODEM STATUS REGISTER – OFFSET 06h......................................................................49
SPECIAL FUNCTION REGISTER – OFFSET 07h...............................................................49
DIVISOR LATCH LOW REGISTER – OFFSET 00h, LCR[7] = 1 ........................................50
DIVISOR LATCH HIGH REGISTER – OFFSET 01h, LCR[7] = 1.......................................50
SAMPLE CLOCK REGISTER – OFFSET 02h, LCR[7] = 1 .................................................50
RECEIVE HOLDING REGISTER – OFFSET 00h ................................................................52
TRANSMIT HOLDING REGISTER – OFFSET 00h..............................................................53
INTERRUPT ENABLE REGISTER – OFFSET 01h ..............................................................53
INTERRUPT STATUS REGISTER – OFFSET 02h................................................................53
FIFO CONTROL REGISTER – OFFSET 02h .......................................................................54
LINE CONTROL REGISTER – OFFSET 03h .......................................................................54
MODEM CONTROL REGISTER – OFFSET 04h .................................................................55
LINE STATUS REGISTER – OFFSET 05h ............................................................................56
MODEM STATUS REGISTER – OFFSET 06h......................................................................56
SPECIAL FUNCTION REGISTER – OFFSET 07h...............................................................57
DIVISOR LATCH LOW REGISTER – OFFSET 08h .............................................................57
DIVISOR LATCH HIGH REGISTER – OFFSET 09h............................................................57
ENHANCED FUNCTION REGISTER – OFFSET 0Ah.........................................................57
XON SPECIAL CHARACTER 1 – OFFSET 0Bh...................................................................59
XON SPECIAL CHARACTER 2 – OFFSET 0Ch ..................................................................59
XOFF SPECIAL CHARACTER 1 – OFFSET 0Dh ................................................................59
XOFF SPECIAL CHARACTER 2 – OFFSET 0Eh ................................................................59
ADVANCE CONTROL REGISTER – OFFSET 0Fh ..............................................................59
TRANSMIT INTERRUPT TRIGGER LEVEL – OFFSET 10h................................................60
RECEIVE INTERRUPT TRIGGER LEVEL – OFFSET 11h ..................................................60
FLOW CONTROL LOW TRIGGER LEVEL – OFFSET 12h .................................................60
FLOW CONTROL HIGH TRIGGER LEVEL – OFFSET 13h ...............................................60
CLOCK PRESCALE REGISTER – OFFSET 14h..................................................................60
RECEIVE FIFO DATA COUNTER – OFFSET 15h, SFR[6] = 0..........................................60
LINE STATUS REGISTER COUNTER – OFFSET 15h, SFR[6] = 1 ....................................61
TRANSMIT FIFO DATA COUNTER – OFFSET 16h, SFR[7] = 1 .......................................61
SAMPLE CLOCK REGISTER – OFFSET 16h, SFR[7] = 0 .................................................61
GLOBAL LINE STATUS REGISTER – OFFSET 17h ............................................................61
RECEIVE FIFO DATA REGISTERS – OFFSET 100h ~ 17Fh..............................................62
TRANSMIT FIFO DATA REGISTERS – OFFSET 100h ~ 17Fh ...........................................62
LINE STATUS FIFO REGISTERS –OFFSET 180h ~ 1FFh ..................................................62
M
EMORY
09-0088
-M
APPING
M
ODE
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PCI Express® Quad UART
PI7C9X7954
Datasheet