SAA7114HV2 NXP Semiconductors, SAA7114HV2 Datasheet - Page 92

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SAA7114HV2

Manufacturer Part Number
SAA7114HV2
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAA7114HV2

Lead Free Status / Rohs Status
Compliant
Philips Semiconductors
SAA7114_3
Product data sheet
10.2.15 Subaddress 0Eh
Table 52:
Bit
D7
D[6:4]
D3
D2
D0
Description
clear DTO
color standard
selection
disable
chrominance
vertical filter and
PAL phase error
correction
fast color time
constant
adaptive
chrominance
comb filter
Chrominance control 1; 0Eh[7:0]
Rev. 03 — 17 January 2006
Symbol
CDTO
CSTD[2:0] 000
DCVF
FCTC
CCOMB
Value
0
1
001
010
011
100
101
110
111
0
1
0
1
0
1
Function
disabled
Every time CDTO is set, the internal subcarrier
DTO phase is reset to 0 and the RTCO output
generates a logic 0 at time slot 68 (see
document “RTC Functional Description” ,
available on request). So an identical subcarrier
phase can be generated by an external device
(e.g. an encoder); if a DTO reset is programmed
via CDTO it has always to be executed in the
following order:
50 Hz/625 lines: PAL BGDHI (4.43 MHz)
60 Hz/525 lines: NTSC M (3.58 MHz)
50 Hz/625 lines: NTSC 4.43 (50 Hz)
60 Hz/525 lines: PAL 4.43 (60 Hz)
50 Hz/625 lines: combination-PAL N (3.58 MHz)
60 Hz/525 lines: NTSC 4.43 (60 Hz)
50 Hz/625 lines: NTSC N (3.58 MHz)
60 Hz/525 lines: PAL M (3.58 MHz)
50 Hz/625 lines: reserved
60 Hz/525 lines: NTSC-Japan (3.58 MHz)
50 Hz/625 lines: SECAM
60 Hz/525 lines: reserved
reserved; do not use
reserved; do not use
chrominance vertical filter and PAL phase error
correction on (during active video lines)
chrominance vertical filter and PAL phase error
correction permanently off
nominal time constant
fast time constant for special applications (high
quality input source, fast chroma lock required,
automatic standard detection off)
disabled
active
1. Set CDTO = 0
2. Set CDTO = 1
PAL/NTSC/SECAM video decoder
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
SAA7114
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