SAA7114HV2 NXP Semiconductors, SAA7114HV2 Datasheet - Page 5
SAA7114HV2
Manufacturer Part Number
SAA7114HV2
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7114HV2.pdf
(144 pages)
Specifications of SAA7114HV2
Lead Free Status / Rohs Status
Compliant
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Fig 1. Block diagram
XTOUT
XTALO
AGND
XTALI
AOUT
(1) The pins RTCO and ALRCLK are used for configuration of the I
AI1D
AI2D
RES
AI11
AI12
AI21
AI22
AI23
AI24
CE
LLC
REAL-TIME OUTPUT
ANALOG
DUAL
TRST
POWER-ON CONTROL
CLOCK GENERATION
ADC
LLC2
BOUNDARY
TCK
RTCO
SCAN
TEST
TMS
AND
(1)
RTS0
TDI
DECODER
ADAPTIVE
DIGITAL
FILTER
TDO
RTS1
COMB
WITH
AMCLK
XCLK
GENERATION
ALRCLK
EXPANSION PORT PIN MAPPING
XDQ
CLOCK
AUDIO
(1)
ASCLK
XPD [ 7:0 ]
AMXCLK
X-PORT I/O FORMATTING
V DD(XTAL)
XRH
V SS(XTAL)
XRV
V DDD(ICO1)
V DDD(ICO6)
XRDY
2
C-bus interface and the definition of the crystal oscillator frequency at RESET (pin strapping).
to
FIR-PREFILTER
XTRI
SCALER BCS
PRESCALER
GENERAL PURPOSE
VBI-DATA SLICER
AND
V DDD(EP1)
V DDD(EP4)
PROGRAMMING
I/O CONTROL
REGISTER
chrominance of 16-bit input
to
ARRAY
HPD [ 7:0 ]
EVENT CONTROLLER
BUFFER
V DDA0
V DDA2
FIFO
LINE
to
V SSD(ICO1)
V SSD(ICO3)
REGISTER
VERTICAL
SDA
SCALING
I
2
to
C-BUS
MUX
A/B
SCL
V SSD(EP1)
V SSD(EP4)
HORIZONTAL
to
SCALING
(PHASE)
FINE
V SSA0
V SSA2
to
TEST5
SAA7114
TEST4
VIDEO
TEXT
FIFO
FIFO
VIDEO/TEXT
ARBITER
TEST3
TEST2
8(16)
MUX
32
to
TEST1
TEST0
mhc611
ITRDY
ITRI
IPD [ 7:0 ]
IDQ
IGPH
IGPV
IGP0
IGP1
ICLK
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