SAA7114HV2 NXP Semiconductors, SAA7114HV2 Datasheet - Page 69

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SAA7114HV2

Manufacturer Part Number
SAA7114HV2
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAA7114HV2

Lead Free Status / Rohs Status
Compliant
Philips Semiconductors
SAA7114_3
Product data sheet
Table 30:
Table 31:
Bit
7
6
5
4
3 to 0
Line number
1 to 3
4 to 19
20
21
22 to 261
262
263
264 and 265
266 to 282
283
284
285 to 524
525
Symbol
F
V
H
P[3:0]
SAV/EAV format on expansion port XPD7 to XPD0
525 lines/60 Hz vertical timing
F (ITU 656)
1
0
0
0
0
0
0
0
1
1
1
1
1
Description
logic 1
field bit
vertical blanking bit
format
reserved; evaluation not recommended (protection bits according to
ITU-R BT 656)
Rev. 03 — 17 January 2006
1st field: F = 0
2nd field: F = 1
for vertical timing see
VBI: V = 1
active video: V = 0
for vertical timing see
H = 0 in SAV format
H = 1 in EAV format
V
OFTS[2:0] = 000
(ITU 656)
1
1
0
0
0
0
0
1
1
0
0
0
0
Table 31
Table 31
and
and
OFTS[2:0] = 001
according to selected VGATE position
type via VSTA and VSTO
(subaddresses 15h to 17h);
see
PAL/NTSC/SECAM video decoder
Table 32
Table 32
Table 60
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
to
Table 62
SAA7114
69 of 144

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