PSMN4R0-25YLC,115 NXP Semiconductors, PSMN4R0-25YLC,115 Datasheet - Page 3

• Manufacturer Part Number: PSMN4R0-25YLC,115
• Description: MOSFET Power N-CH 25 V 4.5 mOhms LOGIC LEVEL MOSFET
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of PSMN4R0-25YLC,115

• Transistor Polarity: N-Channel
• Resistance Drain-source Rds (on): 4.5 mOhms
• Drain-source Breakdown Voltage: 25 V
• Gate-source Breakdown Voltage: 20 V
• Continuous Drain Current: 84 A
• Power Dissipation: 61 W
• Maximum Operating Temperature: + 175 C
• Mounting Style: SMD/SMT
• Package / Case: LFPAK
• Gate Charge Qg: 22.8 nC
• Minimum Operating Temperature: - 55 C
• Fet Type: MOSFET N-Channel, Metal Oxide
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 4.5 mOhm @ 20A, 10V
• Drain To Source Voltage (vdss): 25V
• Current - Continuous Drain (id) @ 25° C: 84A
• Vgs(th) (max) @ Id: 1.95V @ 1mA
• Gate Charge (qg) @ Vgs: 22.8nC @ 10V
• Input Capacitance (ciss) @ Vds: 1407pF @ 12V
• Power - Max: 61W
• Mounting Type: Surface Mount
• Lead Free Status / Rohs Status: Details
• Other names: 934065075115

NXP Semiconductors
4. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134).
PSMN4R0-25YLC
Product data sheet
Symbol
V
V
V
I
I
P
T
T
T
V
Source-drain diode
I
I
Avalanche ruggedness
E
D
DM
S
SM
Fig 1.
stg
j
sld(M)
DS
DGR
GS
tot
ESD
DS(AL)S
(A)
I
D
100
80
60
40
20
0
mounting base temperature
Continuous drain current as function of
0
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
peak soldering temperature
electrostatic discharge voltage
source current
peak source current
non-repetitive drain-source
avalanche energy
50
100
150
All information provided in this document is subject to legal disclaimers.
T
003a a f 505
mb
( C)
Rev. 01 — 2 December 2010
200
Conditions
T
25 °C ≤ T
V
V
pulsed; t
see
T
MM (JEDEC JESD22-A115)
T
pulsed; t
V
V
see
j
mb
mb
GS
GS
GS
sup
≥ 25 °C; T
Figure 4
Figure 3
= 25 °C; see
= 25 °C
= 10 V; T
= 10 V; T
= 10 V; T
≤ 25 V; R
p
p
j
≤ 10 µs; T
≤ 10 µs; T
≤ 175 °C; R
N-channel 25 V 4.5 mΩ logic level MOSFET in LFPAK
j
Fig 2.
≤ 175 °C
mb
mb
j(init)
GS
= 25 °C; see
= 100 °C; see
= 50 Ω; unclamped;
P
Figure 2
(%)
= 25 °C; I
der
120
80
40
mb
mb
0
function of mounting base temperature
Normalized total power dissipation as a
GS
0
= 25 °C;
= 25 °C
= 20 kΩ
D
= 84 A;
Figure 1
Figure 1
50
PSMN4R0-25YLC
100
Min
-
-
-20
-
-
-
-
-55
-55
-
200
-
-
-
150
© NXP B.V. 2010. All rights reserved.
T
mb
175
175
-
Max
25
25
20
84
60
336
61
260
55
336
17.4
03na19
(°C)
200
Unit
V
V
V
A
A
A
W
°C
°C
°C
V
A
A
mJ
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