PSMN1R5-30YLC,115 NXP Semiconductors, PSMN1R5-30YLC,115 Datasheet

MOSFET Power N-Ch 30V 1.55mOhms

PSMN1R5-30YLC,115

Manufacturer Part Number
PSMN1R5-30YLC,115
Description
MOSFET Power N-Ch 30V 1.55mOhms
Manufacturer
NXP Semiconductors
Series
-r
Datasheet

Specifications of PSMN1R5-30YLC,115

Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
1.55 mOhms
Drain-source Breakdown Voltage
30 V
Gate-source Breakdown Voltage
20 V
Continuous Drain Current
100 A
Power Dissipation
179 W
Maximum Operating Temperature
+ 175 C
Mounting Style
SMD/SMT
Package / Case
LFPAK
Gate Charge Qg
65 nC
Minimum Operating Temperature
- 55 C
Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
1.55 mOhm @ 25A, 10V
Drain To Source Voltage (vdss)
30V
Current - Continuous Drain (id) @ 25° C
100A
Vgs(th) (max) @ Id
1.95V @ 1mA
Gate Charge (qg) @ Vgs
65nC @ 10V
Input Capacitance (ciss) @ Vds
4044pF @ 15V
Power - Max
179W
Mounting Type
Surface Mount
Lead Free Status / Rohs Status
 Details
Other names
934065188115
1. Product profile
1.1 General description
1.2 Features and benefits
1.3 Applications
1.4 Quick reference data
Logic level enhancement mode N-channel MOSFET in LFPAK package. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
Table 1.
Symbol
V
I
P
T
Static characteristics
R
D
j
DS
tot
DSon
PSMN1R5-30YLC
N-channel 30 V 1.55mΩ logic level MOSFET in LFPAK using
NextPower technology
Rev. 2 — 17 May 2011
High reliability Power SO8 package,
qualified to 175°C
Optimised for 4.5V Gate drive utilising
NextPower Superjunction technology
DC-to-DC converters
Lithium-ion battery protection
Load switching
Parameter
drain-source
voltage
drain current
total power
dissipation
junction
temperature
drain-source
on-state resistance
Quick reference data
Conditions
25 °C ≤ T
T
see
T
V
see
V
see
mb
mb
GS
GS
= 25 °C; V
Figure 1
= 25 °C; see
Figure 12
Figure 12
= 4.5 V; I
= 10 V; I
j
≤ 175 °C
D
D
GS
= 25 A; T
= 25 A; T
Figure 2
= 10 V;
Ultra low QG, QGD, and QOSS for
high system efficiencies at low and
high loads
Ultra low Rdson and low parasitic
inductance
Power OR-ing
Server power supplies
Sync rectifier
j
j
= 25 °C;
= 25 °C;
[1]
Min
-
-
-
-55
-
-
Product data sheet
Typ
-
-
-
-
1.65 2.05 mΩ
1.3
Max Unit
30
100
179
175
1.55 mΩ
V
A
W
°C

Related parts for PSMN1R5-30YLC,115

PSMN1R5-30YLC,115 Summary of contents

Page 1

... PSMN1R5-30YLC N-channel 30 V 1.55mΩ logic level MOSFET in LFPAK using NextPower technology Rev. 2 — 17 May 2011 1. Product profile 1.1 General description Logic level enhancement mode N-channel MOSFET in LFPAK package. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment ...

Page 2

... see DS see Figure 15 Simplified outline SOT669 (LFPAK; Power-SO8) Description plastic single-ended surface-mounted package; 4 leads Marking code 1C530L All information provided in this document is subject to legal disclaimers. Rev. 2 — 17 May 2011 PSMN1R5-30YLC Min = Figure 14 Figure 14; Graphic symbol mb G mbb076 [1] © ...

Page 3

... Figure 3 003a a f644 120 P der (%) 150 200 T (°C) mb Fig 2. Normalized total power dissipation as a function of mounting base temperature All information provided in this document is subject to legal disclaimers. Rev. 2 — 17 May 2011 PSMN1R5-30YLC Min - = 20 kΩ -20 [1] Figure 1 - [1] Figure ° -55 -55 - ...

Page 4

... Product data sheet N-channel 30 V 1.55mΩ logic level MOSFET in LFPAK using NextPower ( DSon All information provided in this document is subject to legal disclaimers. Rev. 2 — 17 May 2011 PSMN1R5-30YLC 003a a f 658 ( =10 μ 100 μ 100 (V) DS © NXP B.V. 2011. All rights reserved. 003aaf645 ...

Page 5

... Transient thermal impedance from junction to mounting base as a function of pulse duration PSMN1R5-30YLC Product data sheet N-channel 30 V 1.55mΩ logic level MOSFET in LFPAK using NextPower Conditions see Figure All information provided in this document is subject to legal disclaimers. Rev. 2 — 17 May 2011 PSMN1R5-30YLC Min Typ Max - 0.71 0.84 003a a f 646 t p δ ...

Page 6

... Figure see D DS see Figure MHz °C; see Figure 0.6 Ω 4.7 Ω R G(ext) All information provided in this document is subject to legal disclaimers. Rev. 2 — 17 May 2011 PSMN1R5-30YLC Min Typ = 25 ° -55 ° °C; 1.05 1. 150 °C 0 -55 ° ° 150 °C ...

Page 7

... (mΩ ( (V) DS Fig 7. Drain-source on-state resistance as a function of gate-source voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 2 — 17 May 2011 PSMN1R5-30YLC Min Typ - ° 003a a f 648 © NXP B.V. 2011. All rights reserved. Max ...

Page 8

... I (A) D Fig 9. 003a a f 652 V GS (th) (V) Max (V) GS Fig 11. Gate-source threshold voltage as a function of All information provided in this document is subject to legal disclaimers. Rev. 2 — 17 May 2011 PSMN1R5-30YLC 100 150 ° ° Transfer characteristics; drain-source current as a function of gate-source voltage; typical ...

Page 9

... GS 3.0 3.5 10 4.5 75 100 I (A) D Fig 13. Normalized drain-source on-state resistance Q GD 003aaa508 Fig 15. Gate-source voltage as a function of gate All information provided in this document is subject to legal disclaimers. Rev. 2 — 17 May 2011 PSMN1R5-30YLC 2 a 1.5 1 0 factor as a function of junction temperature ( 24V ...

Page 10

... I ( (V) DS Fig 17. Source current as a function of source-drain All information provided in this document is subject to legal disclaimers. Rev. 2 — 17 May 2011 PSMN1R5-30YLC 100 150 ° 0.3 0.6 0.9 voltage; typical values 003a a f 444 003a a f 657 = 25 ° ...

Page 11

... D max 4.41 2.2 0.9 0.25 0.30 4.10 4.20 3.62 2.0 0.7 0.19 0.24 3.80 REFERENCES JEDEC JEITA MO-235 All information provided in this document is subject to legal disclaimers. Rev. 2 — 17 May 2011 PSMN1R5-30YLC detail (1) (1) ( 5.0 3.3 6.2 0.85 1.3 1.27 4.8 3.1 5 ...

Page 12

... NXP Semiconductors 9. Revision history Table 8. Revision history Document ID Release date PSMN1R5-30YLC v.2 20110517 • Modifications: Various changes to content. PSMN1R9-25YLC v.1 20110502 PSMN1R5-30YLC Product data sheet N-channel 30 V 1.55mΩ logic level MOSFET in LFPAK using NextPower Data sheet status Product data sheet Product data sheet All information provided in this document is subject to legal disclaimers ...

Page 13

... Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. All information provided in this document is subject to legal disclaimers. Rev. 2 — 17 May 2011 PSMN1R5-30YLC © NXP B.V. 2011. All rights reserved ...

Page 14

... TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 2 — 17 May 2011 PSMN1R5-30YLC © NXP B.V. 2011. All rights reserved ...

Page 15

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com PSMN1R5-30YLC All rights reserved. Date of release: 17 May 2011 Document identifier: PSMN1R5-30YLC ...

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