VSC8641XKO Vitesse Semiconductor Corp, VSC8641XKO Datasheet - Page 38

• Manufacturer Part Number: VSC8641XKO
• Description: IC PHY 10/100/1000 100-LQFP
• Manufacturer: Vitesse Semiconductor Corp
• Type: PHY Transceiverr

Specifications of VSC8641XKO

• Number Of Drivers/receivers: 1/1
• Protocol: Gigabit Ethernet
• Voltage - Supply: 2.5V, 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Case: TQFP
• Dc: 07+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 907-1031

Figure 16.
3.13.8
Revision 4.3
August 2009
Test Access Port and Boundary-Scan Architecture
After a TAP reset, the Device Identification register is serially connected between TDI
and TDO by default. The TAP Instruction register is loaded either from a shift register
(when a new instruction is shifted in) or, if there is no new instruction in the shift
register, a default value of 0110 (IDCODE) is loaded. Using this method, there is always
a valid code in the instruction register, and the problem of toggling instruction bits
during a shift is avoided. Unused codes are mapped to the BYPASS instruction.
JTAG Instruction Codes
The VSC8641 device supports the following instruction codes.
EXTEST Allows testing of off-chip circuitry and board-level interconnections by
sampling input pins and loading data onto output pins. Outputs are driven by the
contents of the boundary-scan cells, which have to be updated with valid values (with
the PRELOAD instruction) prior to the EXTEST instruction.
SAMPLE/PRELOAD Allows a snapshot of inputs and outputs during normal system
operation to be taken and examined. It also allows data values to be loaded into the
boundary-scan cells prior to the selection of other boundary-scan test instructions.
TDI
TMS
NTRST
TCK
Test Access Port
Controller
Device Identification
Instruction Register,
Instruction Decode,
Bypass Register
Boundary-Scan
Register
Register
Control
Control
Select
tdoenable
Control
Functional Descriptions
Mux,
DFF
VSC8641 Datasheet
Page 38
TDO