VSC8641XKO Vitesse Semiconductor Corp, VSC8641XKO Datasheet - Page 13

• Manufacturer Part Number: VSC8641XKO
• Description: IC PHY 10/100/1000 100-LQFP
• Manufacturer: Vitesse Semiconductor Corp
• Type: PHY Transceiverr

Specifications of VSC8641XKO

• Number Of Drivers/receivers: 1/1
• Protocol: Gigabit Ethernet
• Voltage - Supply: 2.5V, 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Case: TQFP
• Dc: 07+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 907-1031

Revision 2.2
Revision 2.1
Revision 4.3
August 2009
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Revision 2.2 of this datasheet was published in March 2006. In revision 2.2 of the
document, in the list of GMII/RGMII MAC interface pins, two pin numbers were
corrected. The pin number for NSRESET was corrected from 32 to 50. The pin number
for OSCEN/CLKOUT was corrected from 43 to 66.
Revision 2.1 of this datasheet was published in February 2006. The following is a
summary of the changes implemented in the datasheet:
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•
In the DC Characteristics for V
(I
the same condition (internal resistor included). Specifically, the values were
changed from –10 µA minimum and 10 µA maximum to –25 µA minimum and
25 µA maximum.
In the DC characteristics for V
voltage parameter (V
corrected to the condition I
For all the current consumption specifications with the on-chip switching regulator
enabled, the specification values for I
they were inadvertently added in a prior revision of this document. The I
I
For the 100BASE current consumption specifications, all references to the speed
were corrected from 100BASE-X to 100BASE-TX.
In the AC characteristics for the CLKOUT pin, the total jitter specifications were
added. They are 217 ps typical and 491 ps maximum.
For device reset, both the reset characteristics and timing diagram were updated to
include new parameters: reset rise time (t
(t
The MII transmit timing figure was updated to be more accurate and to imply when
the MAC must display valid data to the VSC8641.
In the stress ratings, the power supply voltage parameter was removed because it
was redundant.
In the pin description for TX_CLK, the rate was clarified to be 2.5 MHz for 10 Mbps
mode, 25 MHz for 100 Mbps mode, or 125 MHz for 1000 Mbps mode.
The errata item “RX_CLK Can Reach as High as 55% Duty Cycle” remains in effect
but all other errata items no longer apply to the latest part revision.
In the high-level block diagram, representation of the XTAL pin was corrected from
“XTAL 1/2” to “XTAL1” and “XTAL2.”
New information was added about how to manually force the device to use MDI/
MDI-X.
VDD12A
OLEAK
VDDSTABLE
) was changed to match the same values as the input leakage (I
values are kept for current consumption with the regulator disabled.
).
OH
) incorrectly stated I
OH
DDIOMAC
= –1.0 mA.
DDIOMAC
VDD12
or V
or V
RST_RISE
DDIOMICRO
DDIOMICRO
and I
OH
= 1.0 mA as a condition. It is now
VDD12A
) and supply stable time
at 2.5 V, the output high
at 2.5 V, the output leakage
were removed because
VSC8641 Datasheet
Revision History
ILEAK
VDD12
Page 13
) with
and