VSC8641XKO Vitesse Semiconductor Corp, VSC8641XKO Datasheet - Page 105

• Manufacturer Part Number: VSC8641XKO
• Description: IC PHY 10/100/1000 100-LQFP
• Manufacturer: Vitesse Semiconductor Corp
• Type: PHY Transceiverr

Specifications of VSC8641XKO

• Number Of Drivers/receivers: 1/1
• Protocol: Gigabit Ethernet
• Voltage - Supply: 2.5V, 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Case: TQFP
• Dc: 07+
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 907-1031

6.6
6.6.1
Table 90.
6.6.2
Table 91.
Revision 4.3
August 2009
Pins by Function (VSC8641XKO, VSC8641XKO-03)
This section contains the functional pin descriptions for the VSC8641XKO and
VSC8641XKO-03 devices.
Twisted Pair Interface
The following table lists the device pins associated with the device two-wire, twisted
pair interface.
Twisted Pair Interface Pins
GMII/RGMII MAC Interface
The following table lists the device pins associated with the GMII/RGMII MAC interface.
Note that the pins in this table are referenced to VDDIO
3.3 V power supply.
GMII/RGMII MAC Interface Pins
Pin
84
85
86
87
89
90
91
92
Pin
28
29
30
31
33
34
35
36
37
Name
TXVPA
TXVNA
TXVPB
TXVNB
TXVPC
TXVNC
TXVPD
TXVND
Name
RXD7
RXD6
RXD5
RXD4
RXD3
RXD2
RXD1
RXD0
RX_CLK
Type
A
A
A
A
A
A
A
A
DIFF
DIFF
DIFF
DIFF
DIFF
DIFF
DIFF
DIFF
Type
Description
TX/RX channel A positive signal
TX/RX channel A negative signal
TX/RX channel B positive signal
TX/RX channel B negative signal
TX/RX channel C positive signal
TX/RX channel C negative signal
TX/RX channel D positive signal
TX/RX channel D negative signal
O
O
O
ZC
ZC
ZC
Description
GMII Mode:
Receive data [7:4] pins. These pins are
synchronously output on the rising edge of
RX_CLK.
RGMII Mode:
Not used. Leave unconnected.
GMII Mode:
Receive data [3:0] pins. These pins are
synchronously output on the rising edge of
RX_CLK.
RGMII Mode:
Multiplexed receive data. Bits[3:0] are
synchronously output on the rising edge of
RX_CLK and bits[7:4] on the falling edge of
RX_CLK.
Receive clock. Receive data is sourced from the
PHY synchronously on the rising edge of RX_CLK
and is the recovered clock from the media.
MAC
and can be set to a 2.5 V or
VSC8641 Datasheet
Pin Descriptions
Page 105