MT46H8M32LFB5-6:A Micron Technology Inc, MT46H8M32LFB5-6:A Datasheet - Page 8
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MT46H8M32LFB5-6:A
Manufacturer Part Number
MT46H8M32LFB5-6:A
Description
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet
1.MT46H8M32LFB5-6A.pdf
(96 pages)
Specifications of MT46H8M32LFB5-6:A
Organization
8Mx32
Density
256Mb
Address Bus
14b
Access Time (max)
6.5/5ns
Maximum Clock Rate
166MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
120mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT46H8M32LFB5-6:A
Manufacturer:
MICRON
Quantity:
20 000
Company:
Part Number:
MT46H8M32LFB5-6:A TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
General Description
PDF: 09005aef834bf85b
256mb_mobile_ddr_sdram_t36n.pdf - Rev. H 11/09 EN
The 256Mb Mobile DDR SDRAM is a high-speed CMOS, dynamic random-access mem-
ory containing 268,435,456 bits. It is internally configured as a quad-bank DRAM. Each
of the x16’s 67,108,864-bit banks is organized as 8192 rows by 512 columns by 16 bits.
Each of the x32’s 67,108,864-bit banks is organized as 4096 rows by 512 columns by 32
bits. In the reduced page-size (LG) option, each of the x32’s 67,108,864-bit banks are
organized as 8192 rows by 256 columns by 32 bits.
Note:
1. Throughout this data sheet, various figures and text refer to DQs as “DQ.” DQ should
be interpreted as any and all DQ collectively, unless specifically stated otherwise. Addi-
tionally, the x16 is divided into 2 bytes: the lower byte and the upper byte. For the lower
byte (DQ[7:0]), DM refers to LDM and DQS refers to LDQS. For the upper byte
(DQ[15:8]), DM refers to UDM and DQS refers to UDQS. The x32 is divided into 4 bytes.
For DQ[7:0], DM refers to DM0 and DQS refers to DQS0. For DQ[15:8], DM refers to
DM1 and DQS refers to DQS1. For DQ[23:16], DM refers to DM2 and DQS refers to
DQS2. For DQ[31:24], DM refers to DM3 and DQS refers to DQS3.
2. Complete functionality is described throughout the document; any page or diagram
may have been simplified to convey a topic and may not be inclusive of all requirements.
3. Any specific requirement takes precedence over a general statement.
8
256Mb: x16, x32 Mobile LPDDR SDRAM
Micron Technology, Inc. reserves the right to change products or specifications without notice.
General Description
©2008 Micron Technology, Inc. All rights reserved.