MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 337

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.41.4.8.4.1
This is a level sensitive active high external interrupt driven by the D2DINT input. This interrupt is enabled if the D2DIE bit in the
D2DCTL1 register is set. The interrupt must be cleared using an target specific clearing sequence. The status of the D2D input
pin can be observed by reading the D2DIF bit in the D2DSTAT1 register.
The D2DINIT signal is asserted also in the stop mode; it can be used to leave these modes.
4.41.4.8.4.2
Those D2D interface specific interrupts are level sensitive and are all cleared by writing a 1 to the ERRIF flag in the D2DSTAT0
register. This interrupt is not locally maskable and should be tied to the highest possible interrupt level in the system, on an S12
architecture to the XIRQ. See the chapter “Vectors” of the MCU description for details.
4.41.5
During initialization the transfer width, clock divider and timeout value must be set according to the capabilities of the target device
before starting any transaction. See the D2D Target specification for details.
4.41.6
4.41.6.1
The D2DI module is typically used on a microcontroller along with an analog companion device containing the D2D target
interface and supplying the power. Interface specification does not provide special wires for signalling low power modes to the
target device. The CPU should determine when it is time to enter one of the above power modes.The basic flow is as follows:
Freescale Semiconductor
1.
2.
3.
4.
5.
CPU determines there is no more work pending.
CPU writes a byte to a register on the analog die using blocking write configuring which mode to enter.
Analog die acknowledges that write sending back an acknowledge symbol on the interface.
CPU executes STOP command.
Analog die can enter low power mode - (S12 needs some more cycles to stack data!)
; Example shows S12 code
SEI
; check is there is work pending?
; if yes, branch off and re-enable interrupt
; else
LDAA
STAA
Initialization Information
Application Information
Entering low power mode
D2D External Interrupt
D2D Error Interrupt
; disable interrupts during test
#STOP_ENTRY
MODE_REG
To read data bus (D2DSTAT1.D2DIF)
D2DINTI
ERRIF
D2DERRINT
Figure 120. D2D External Interrupt Scheme
MM912_634 Advance Information, Rev. 4.0
Figure 121. D2D Internal Interrupts
; store to the analog die mode reg (use blocking write here)
D2DEN
1
D2DIE
ACKERF
CNCLF
TERRF
TIMEF
PARF
D2DINT
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