PSB21383HV13XT Infineon Technologies, PSB21383HV13XT Datasheet - Page 66

• Manufacturer Part Number: PSB21383HV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21383HV13XT

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

Data Sheet
MX/MR Treatment in Error Case:
In the master mode the MX/MR bits are under control of the microcontroller through MXC
or MRC respectively. An abort is indicated by an MAB interrupt or MER interrupt
respectively.
In the slave mode the MX/MR bits are under control of the SCOUT. An abort is always
indicated by setting the MX/MR bit inactive for two or more IOM-2 frames. The controller
must react with EOM.
Figure 33 shows an example for an abort requested by the receiver, Figure 34 shows
an example for an abort requested by the transmitter and Figure 35 shows an example
for a successful transmission.
Figure 33
Monitor Channel, Transmission Abort requested by the Receiver
Figure 34
Monitor Channel, Transmission Abort requested by the Transmitter
IOM -2 Frame No.
MR (DU)
MX (DD)
IOM -2 Frame No.
MX (DU)
MR (DD)
1
0
1
0
1
0
1
0
1
1
2
2
Abort Request from Transmitter
Abort Request from Receiver
56
3
3
4
4
5
5
EOM
EOM
6
6
mon_rec-abort.vsd
mon_tx-abort.vsd
7
7
PSB 21381/2
PSB 21383/4
Interfaces
2001-03-12