PSB21383HV13XT Infineon Technologies, PSB21383HV13XT Datasheet - Page 195

• Manufacturer Part Number: PSB21383HV13XT
• Manufacturer: Infineon Technologies

Specifications of PSB21383HV13XT

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

7.1.7
Value after reset: C0
MODEH
MDS2-0
Determines the message transfer mode of the HDLC controller, as follows:
MDS2-0
0
0
0
0
1
1
1
1
Note: SAP1, SAP2: two programmable address values for the first received address
Data Sheet
0
0
1
1
0
1
1
0
byte (in the case of an address field longer than 1 byte);
SAPG = fixed value FC / FE
TEI1, TEI2: two programmable address values for the second (or the only, in the
case of a one-byte address) received address byte; TEIG = fixed value FF
Two different methods of the high byte and/or low byte address comparison can
be selected by setting SAP1.MHA and/or SAP2.MLA (see also description of
these bits in chapter 7.1.10 or 7.1.12 respectively)
0
1
0
1
0
0
1
1
Mode
Reserved
Reserved
Non-Auto
mode
Non-Auto
mode
Extended
transparent
mode
Transparent
mode 0
Transparent
mode 1
Transparent
mode 2
MODEH - Mode Register
MDS2 MDS1 MDS0
7
... Mode Select
H
Number of
Address
Bytes
1
2
–
> 1
> 1
H
Address Comparison
1.Byte
TEI1,TEI2
SAP1,SAP2,SAPG
–
SAP1,SAP2,SAPG
–
.
0
185
RAC
DIM2
2.Byte
–
TEI1,TEI2,TEIG Two-byte address
–
–
TEI1,TEI2,TEIG Low-byte address
Detailed Register Description
DIM1
0
DIM0 RD/WR (22
Remark
One-byte address
compare.
compare.
No address
compare. All
frames accepted.
High-byte address
compare.
compare.
PSB 21381/2
PSB 21383/4
2001-03-12
H
H
)