PSB21150FV14XT Infineon Technologies, PSB21150FV14XT Datasheet - Page 34

• Manufacturer Part Number: PSB21150FV14XT
• Manufacturer: Infineon Technologies

Specifications of PSB21150FV14XT

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

3.2
The IPAC-X supports a serial or a parallel microcontroller interface. For applications
where no controller is connected to the IPAC-X microcontroller interface programming is
done via the IOM-2 MONITOR channel from a master device. In such applications the
IPAC-X operates in the IOM-2 slave mode (refer to the corresponding chapter of the
IOM-2 MONITOR handler). This mode is suitable for control functions (e.g. programming
registers of the S/T transceiver), but the band width is not sufficient for access to the
HDLC controllers.
The interface selections are all done by pinstrapping (see
are evaluated when the reset input RES is active. For the pin levels stated in the tables
the following is defined:
’High’, ’Low’:dynamic pin; value must be ’High’ or ’Low’ only during reset
V
edge: dynamic pin; any transition (’High’ to ’Low’, ’Low’ to ’High’) has occured.
Table 3
WR
(R/W)
’High’
V
Note: For a selected interface mode which doesn’t need all input selection and address
The interfaces contain all circuitry necessary for the access to programmable registers,
status registers and HDLC FIFOs. The mapping of all these registers can be found in
Chapter
The microcontroller interface also provides an interrupt request at pin INT which is low
active by default but can be reprogrammed to high active, a reset input pin RES and a
reset output pin RSTO.
The interrupt request pin INT becomes active if the IPAC-X requests an interrupt and this
can occur at any time.
Data Sheet
DD
SS
, V
PINS
pins the unused pins must be tied to V
SS
RD
(DS)
’High’ Parallel
V
4.
: static pin; pin must statically be strapped to ’High’ or ’Low’ level
SS
Microcontroller Interfaces
Host Interface Selection
Serial
No
Host Interface
Serial /Parallel
Interface
CS
‘High’ V
’High’ V
V
SS
PINS
ALE
V
edge
V
DD
SS
SS
SS
34
DD
or V
Interface
Type/Mode
Motorola
Siemens/Intel Non-Mux
Siemens/Intel Mux
Serial Control Interface(SCI)
IOM-2 MONITOR Channel
(Slave Mode)
Description of Functional Blocks
SS
.
Table
3). The selection pins
PSB/PSF 21150
2003-01-30
IPAC-X