PSB21150FV14XT Infineon Technologies, PSB21150FV14XT Datasheet - Page 10

no-image

PSB21150FV14XT

Manufacturer Part Number
PSB21150FV14XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB21150FV14XT

Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
List of Figures
Figure 39
Figure 40
Figure 41
Figure 42
Figure 43
Figure 44
Figure 45
Figure 46
Figure 47
Figure 48
Figure 49
Figure 50
Figure 51
Figure 52
Figure 53
Figure 54
Figure 55
Figure 56
Figure 57
Figure 58
Figure 59
Figure 60
Figure 61
Figure 62
Figure 63
Figure 64
Figure 65
Figure 66
Figure 67
Figure 68
Figure 69
Figure 70
Figure 71
Figure 72
Figure 73
Figure 74
Figure 75
Data Sheet
Buffered Oscillator Clock Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Layer-1 Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
State Diagram Notation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
State Transition Diagram (TE, LT-T) . . . . . . . . . . . . . . . . . . . . . . . . . . 76
State Transition Diagram of Unconditional Transitions (TE, LT-T) . . . 77
State Transition Diagram (LT-S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
State Transition Diagram (NT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Example of Activation/Deactivation Initiated by the Terminal . . . . . . . 91
Example of Activation/Deactivation initiated by the Terminal (TE).
Activation/Deactivation Completely Under Software Control . . . . . . . . 92
Example of Activation/Deactivation Initiated by the Network
Termination (NT). Activation/Deactivation Completely Under
SoftwarControl . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
IOM Ò -2 Frame Structure in Terminal Mode . . . . . . . . . . . . . . . . . . . . 95
Multiplexed Frame Structure of the IOM-2 Interface
in Non-TE Timing Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Architecture of the IOM Handler (Example Configuration). . . . . . . . . . 98
Data Access via CDAx1 and CDAx2 Register Pairs . . . . . . . . . . . . . 100
Examples for Data Access via CDAxy Registers . . . . . . . . . . . . . . . . 101
Data Access when Looping TSa from DU to DD . . . . . . . . . . . . . . . . 102
Data Access When Shifting TSa to TSb on DU (DD) . . . . . . . . . . . . 103
Example for Monitoring Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Interrupt Structure of the Synchronous Data Transfer . . . . . . . . . . . . 106
Examples for the Synchronous Transfer Interrupt Control With One
Enabled STIxy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Timeslot Assignment on IOM-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Examples for HDLC Controller Access . . . . . . . . . . . . . . . . . . . . . . . 110
Timeslot Assignment on S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Mapping of Bits from IOM-2 to S . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Data Strobe Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Strobed IOM-2 Bit Clock. Register SDS_CONF Programmed to 01H 114
Examples of MONITOR Channel Applications in IOM -2 TE Mode . . 115
MONITOR Channel Protocol (IOM-2) . . . . . . . . . . . . . . . . . . . . . . . . 118
Monitor Channel, Transmission Abort Requested by the Receiver . . 121
Monitor Channel, Transmission Abort Requested by the Transmitter 121
Monitor Channel, Normal End of Transmission . . . . . . . . . . . . . . . . . 122
MONITOR Interrupt Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
CIC Interrupt Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
Applications of TIC Bus in IOM-2 Bus Configuration . . . . . . . . . . . . . 129
Structure of Last Octet of Ch2 on DU . . . . . . . . . . . . . . . . . . . . . . . . 130
Structure of Last Octet of Ch2 on DD . . . . . . . . . . . . . . . . . . . . . . . . 131
D-Channel Access Control on the S-Interface . . . . . . . . . . . . . . . . . . 132
10
PSB/PSF 21150
2003-01-30
IPAC-X
Page

Related parts for PSB21150FV14XT