STM32W108CBU64TR STMicroelectronics, STM32W108CBU64TR Datasheet - Page 25
STM32W108CBU64TR
Manufacturer Part Number
STM32W108CBU64TR
Description
MCU, RF, 32BIT, 128K FLASH, 48VFQFPN
Manufacturer
STMicroelectronics
Series
STM32r
Specifications of STM32W108CBU64TR
Controller Family/series
STM32
Core Size
32bit
No. Of I/o's
24
Program Memory Size
128KB
Ram Memory Size
8KB
Cpu Speed
24MHz
Oscillator Type
Internal, External
No. Of Timers
2
Rohs Compliant
Yes
Applications
RF4CE, Remote Control
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (128 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
24
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
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Manufacturer
Quantity
Price
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Part Number:
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Manufacturer:
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STM32W108CB, STM32W108HB
Table 2.
Package
Pin no.
48-Pin
38
39
40
41
Package
Pin no.
40-Pin
Pin descriptions (continued)
31
32
33
34
PC1
ADC3
SWO
(see also Pin
33)
TRACEDATA0
VDD_MEM
PC0
JRST
IRQD
TRACEDATA1
PB7
ADC2
IRQC
TIM1_CH2
Signal
(1)
(1)
Direction
Analog
current
current
Analog
Power
High
High
I/O
I/O
I/O
O
O
O
O
I
I
I
I
Doc ID 16252 Rev 8
Digital I/O
ADC Input 3
Enable analog function with GPIO_PCCFGL[7:4]
Serial Wire Output asynchronous trace output to debugger
Select asynchronous trace interface in ARM core
Enable trace interface in ARM core
Select alternate output function with GPIO_PCCFGL[7:4]
Synchronous CPU trace data bit 0
Select 1-, 2- or 4-wire synchronous trace interface in ARM
core
Enable trace interface in ARM core
Select alternate output function with GPIO_PCCFGL[7:4]
1.8 V supply (flash, RAM)
Digital I/O
Either enable with GPIO_DBGCFG[5],
or enable Serial Wire mode (see JTMS description, Pin 35)
and disable TRACEDATA1
JTAG reset input from debugger
Selected when in JTAG mode (default mode, see JTMS
description) and TRACEDATA1 is disabled
Internal pull-up is enabled
Default external interrupt source D
Synchronous CPU trace data bit 1
Select 2- or 4-wire synchronous trace interface in ARM core
Enable trace interface in ARM core
Select alternate output function with GPIO_PCCFGL[3:0]
Digital I/O
ADC Input 2
Enable analog function with GPIO_PBCFGH[15:12]
Default external interrupt source C
Timer 1 channel 2 output
Enable timer output in TIM1_CCER
Select alternate output function with GPIO_PBCFGH[15:12]
Timer 1 channel 2 input (Cannot be remapped)
Description
Pinout and pin description
25/209
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