STM32W108CBU64TR STMicroelectronics, STM32W108CBU64TR Datasheet - Page 182

• Manufacturer Part Number: STM32W108CBU64TR
• Description: MCU, RF, 32BIT, 128K FLASH, 48VFQFPN
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32W108CBU64TR

• Controller Family/series: STM32
• Core Size: 32bit
• No. Of I/o's: 24
• Program Memory Size: 128KB
• Ram Memory Size: 8KB
• Cpu Speed: 24MHz
• Oscillator Type: Internal, External
• No. Of Timers: 2
• Rohs Compliant: Yes
• Applications: RF4CE, Remote Control
• Core Processor: ARM® Cortex-M3™
• Program Memory Type: FLASH (128 kB)
• Controller Series: STM32W
• Ram Size: 8K x 8
• Interface: I²C, SPI, UART/USART
• Number Of I /o: 24
• Voltage - Supply: 1.18 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Debug support
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Debug support
The STM32W108 includes a standard Serial Wire and JTAG (SWJ) Interface. The SWJ is
the primary debug and programming interface of the STM32W108. The SWJ gives debug
tools access to the internal buses of the STM32W108, and allows for non-intrusive memory
and register access as well as CPU halt-step style debugging. Therefore, any design
implementing the STM32W108 should make the SWJ signals readily available.
Serial Wire is an ARM® standard, bi-directional, two-wire protocol designed to replace
JTAG, and provides all the normal JTAG debug and test functionality. JTAG is a standard
five-wire protocol providing debug and test functionality. In addition, the two Serial Wire
signals (SWDIO and SWCLK) are overlaid on two of the JTAG signals (JTMS and JTCK).
This keeps the design compact and allows debug tools to switch between Serial Wire and
JTAG as needed, without changing pin connections.
While Serial Wire and JTAG offer the same debug and test functionality, ST recommends
Serial Wire. Serial Wire uses only two pins instead of five, and offers a simple
communication protocol, high performance data rates, low power, built-in error detection,
and protection from glitches.
The ARM® CoreSight Debug Access Port (DAP) comprises the Serial Wire and JTAG
Interface (SWJ).The DAP includes two primary components: a debug port (the SWJ-DP)
and an access port (the AHB-AP). The SWJ-DP provides external debug access, while the
AHB-AP provides internal bus access. An external debug tool connected to the
STM32W108's debug pins communicates with the SWJ-DP. The SWJ-DP then
communicates with the AHB-AP. Finally, the AHB-AP communicates on the internal bus.
Figure 52. SWJ block diagram
Serial Wire and JTAG share five pins:
●
●
●
●
●
Since these pins can be repurposed, refer to
page 15
descriptions and configurations.
pins
JRST
JTDO
JTDI
SWDIO/JTMS
SWCLK/JTCK
and
Section 8: General-purpose input/outputs on page 55
SWJ-DP
select
Doc ID 16252 Rev 8
interface
interface
JTAG
SWJ-DP
SW
SWJ-DAP
Section 3: Pinout and pin description on
AP interface
Control and
STM32W108CB, STM32W108HB
for complete pin
AHB-AP
AHB