IDT82P2282PFG IDT, Integrated Device Technology Inc, IDT82P2282PFG Datasheet - Page 156

• Manufacturer Part Number: IDT82P2282PFG
• Description: TXRX T1/J1/E1 2CHAN 100-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Transceiverr

Specifications of IDT82P2282PFG

• Number Of Drivers/receivers: 2/2
• Protocol: IEEE 1149.1
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Screening Level: Industrial
• Pin Count: 100
• Mounting: Surface Mount
• Package Type: TQFP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 82P2282PFG

T1/J1 TBIF Option Register (042H, 142H)
FBITGAP:
DE:
and MTSIG.
FE:
CMS:
010H) is set to ‘1’), the bit of the two links should be set to the same value.
FSINV:
FSTYP:
first link.
mode, MTSFS pulses during the first F-bit of every SF/ESF/T1 DM/SLC-96 frame of the first link.
Programming Information
IDT82P2282
Bit Name
Default
Bit No.
Type
This bit is valid in Transmit Clock Master mode.
= 0: The F-bit is not gapped.
= 1: The F-bit is gapped (no clock signal during the F-bit).
This bit selects the active edge of TSCKn to sample the data on TSDn and TSIGn and the active edge of MTSCK to sample the data on MTSD
= 0: The falling edge is selected.
= 1: The rising edge is selected.
In Transmit Multiplexed mode, the bit of the two links should be set to the same value.
This bit selects the active edge of TSCKn to update/sample the pulse on TSFSn and the active edge of MTSCK to sample the pulse on MTSFS.
= 0: The falling edge is selected.
= 1: The rising edge is selected.
In Transmit Multiplexed mode, the bit of the two links should be set to the same value.
This bit is valid in Transmit Clock Slave T1/J1 mode E1 rate and Transmit Multiplexed mode.
= 0: The speed of the TSCKn / MTSCK is the same as the data rate on the system side (2.048 MHz / 8.192 MHz).
= 1: The speed of the TSCKn / MTSCK is double the data rate on the system side (4.096 MHz / 16.384 MHz).
In Transmit Clock Slave T1/J1 mode E1 rate, if both two links use the TSCK[1] and TSFS[1] to input the data (i.e., the TSLVCK bit (b, T1/J1-
In Transmit Multiplexed mode, the bit of the two links should be set to the same value.
= 0: The transmit framing pulse TSFSn is active high.
= 1: The transmit framing pulse TSFSn is active low.
In Transmit Multiplexed mode, this bit of the two links should be set to the same value.
= 0: In Transmit Non-multiplexed mode, TSFSn pulses during each F-bit. In Transmit Multiplexed mode, MTSFS pulses during each F-bit of the
= 1: In Transmit Non-multiplexed mode, TSFSn pulses during the first F-bit of every SF/ESF/T1 DM/SLC-96 frame. In Transmit Multiplexed
In Transmit Multiplexed mode, this bit of the two links should be set to the same value.
7
Reserved
6
FBITGAP
R/W
5
0
R/W
DE
4
0
156
DUAL T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
R/W
FE
3
0
CMS
R/W
2
0
FSINV
R/W
1
0
August 20, 2009
FSTYP
R/W
0
0