PIC18F25K22-I/SP Microchip Technology Inc., PIC18F25K22-I/SP Datasheet - Page 126

• Manufacturer Part Number: PIC18F25K22-I/SP
• Description: 32KB, Flash, 1536bytes-RAM, 8-bit Family, nanoWatt XLP, 28 SPDIP .300in TUBE
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F25K22-I/SP

• A/d Inputs: 17-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 24
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 64 MHz
• Temperature Range: –40 to 125 °C
• Timers: 3-8-bit, 4-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18(L)F2X/4XK22
REGISTER 9-12:
REGISTER 9-13:
DS41412D-page 126
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-3
bit 2
bit 1
bit 0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-3
bit 2
bit 1
bit 0
U-0
U-0
—
—
Unimplemented: Read as ‘0’
CCP5IE: CCP5 Interrupt Enable bit
1 = Enabled
0 = Disabled
CCP4IE: CCP4 Interrupt Enable bit
1 = Enabled
0 = Disabled
CCP3IE: CCP3 Interrupt Enable bit
1 = Enabled
0 = Disabled
Unimplemented: Read as ‘0’
TMR6IE: TMR6 to PR6 Match Interrupt Enable bit
1 = Enables the TMR6 to PR6 match interrupt
0 = Disables the TMR6 to PR6 match interrupt
TMR5IE: TMR5 Overflow Interrupt Enable bit
1 = Enables the TMR5 overflow interrupt
0 = Disables the TMR5 overflow interrupt
TMR4IE: TMR4 to PR4 Match Interrupt Enable bit
1 = Enables the TMR4 to PR4 match interrupt
0 = Disables the TMR4 to PR4 match interrupt
U-0
U-0
—
—
PIE4: PERIPHERAL INTERRUPT ENABLE (FLAG) REGISTER 4
PIE5: PERIPHERAL INTERRUPT ENABLE (FLAG) REGISTER 5
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
U-0
U-0
—
—
U-0
U-0
Preliminary
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
CCP5IE
TMR6IE
R/W-0
R/W-0
 2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
CCP4IE
TMR5IE
R/W-0
R/W-0
CCP3IE
TMR4IE
R/W-0
R/W-0
bit 0
bit 0