PIC24FJ64GA002-I/SO Microchip Technology Inc., PIC24FJ64GA002-I/SO Datasheet - Page 130

• Manufacturer Part Number: PIC24FJ64GA002-I/SO
• Description: MCU, 16-Bit, 28-Pin, 64KB Flash, 8KB RAM, 21 I/O, Nanowatt
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24FJ64GA002-I/SO

• A/d Inputs: 10 Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 21
• Interface: I2C/SPI/UART
• Memory Capacity: 64 Kbytes
• Memory Type: Flash
• Number Of Bits: 16
• Number Of Inputs: 21
• Number Of Pins: 28
• Package Type: 28-pin SOIC
• Programmable Memory: 64K Bytes
• Ram Size: 8K Bytes
• Speed: 32 MHz
• Timers: 5-16-bit
• Voltage, Range: 2-3.6 V
• Voltage, Rating: 2-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC24FJ64GA004 FAMILY
13.3
The following steps should be taken when configuring
the output compare module for PWM operation:
1.
2.
3.
4.
5.
6.
13.3.1
The PWM period is specified by writing to PRy, the
Timer Period register. The PWM period can be
calculated using Equation 13-1.
EQUATION 13-2:
DS39881B-page 128
Note:
Note:
Set the PWM period by writing to the selected
Timer Period register (PRy).
Set the PWM duty cycle by writing to the OCxRS
register.
Write the OCxR register with the initial duty cycle.
Enable interrupts, if required, for the timer and
output compare modules. The output compare
interrupt is required for PWM Fault pin utilization.
Configure the output compare module for one of
two PWM operation modes by writing to the
Output
(OCxCON<2:0>).
Set the TMRy prescale value and enable the time
base by setting TON (TxCON<15>) = 1.
Pulse-Width Modulation Mode
This peripheral contains input and output
functions that may need to be configured
by
Section 9.4 “Peripheral Pin Select” for
more information.
The OCxR register should be initialized
before the output compare module is first
enabled. The OCxR register becomes a
Read-Only Duty Cycle register when the
module is operated in the PWM modes.
The value held in OCxR will become the
PWM duty cycle for the first PWM period.
The contents of the Output Compare x
Secondary register, OCxRS, will not be
transferred into OCxR until a time base
period match occurs.
PWM PERIOD
Compare
the
Maximum PWM Resolution (bits) =
Note 1: Based on T
peripheral
CALCULATION FOR MAXIMUM PWM RESOLUTION
Mode
bits,
pin
select.
OCM<2:0>
CY
= T
CY
See
/2; Doze mode and PLL are disabled.
Preliminary
log
10
(
F
PWM
EQUATION 13-1:
13.3.2
The PWM duty cycle is specified by writing to the
OCxRS register. The OCxRS register can be written to
at any time, but the duty cycle value is not latched into
OCxR until a match between PRy and TMRy occurs
(i.e., the period is complete). This provides a double
buffer for the PWM duty cycle and is essential for glitch-
less PWM operation. In the PWM mode, OCxR is a
read-only register.
Some important boundary parameters of the PWM duty
cycle include:
• If the Output Compare x register, OCxR, is loaded
• If OCxR is greater than PRy (Timer Period
• If OCxR is equal to PRy, the OCx pin will be low
See Example 13-1 for PWM mode timing details.
Table 13-1 shows example PWM frequencies and
resolutions for a device operating at 10 MIPS.
PWM Period = [(PRy) + 1] • T
where:
Note 1:
Note:
with 0000h, the OCx pin will remain low (0% duty
cycle).
register), the pin will remain high (100% duty
cycle).
for one time base count value and high for all
other count values.
PWM Frequency = 1/[PWM Period]
• (Timer Prescale Value)
log
10
F
(2)
A PRy value of N will produce a PWM
period of N + 1 time base count cycles. For
example, a value of 7 written into the PRy
register will yield a period consisting of
8 time base cycles.
PWM DUTY CYCLE
CY
Based on T
PLL are disabled.
(1)
CALCULATING THE PWM
PERIOD
CY
© 2007 Microchip Technology Inc.
)
= T
CY
bits
CY
• (Timer Prescale Value)
(1)
/2; Doze mode and