PIC24FJ256GB210-I/PT Microchip Technology Inc., PIC24FJ256GB210-I/PT Datasheet - Page 75
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PIC24FJ256GB210-I/PT
Manufacturer Part Number
PIC24FJ256GB210-I/PT
Description
100 TQFP 12x12x1mm TRAY, 16-bit, 256KB Flash, 96K RAM, USB
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC24FJ256GB206-IPT.pdf
(386 pages)
Specifications of PIC24FJ256GB210-I/PT
A/d Inputs
24 Channel, 10-bit
Comparators
3
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
84
Interface
I2C/SPI/UART/USART/USB
Memory Type
Flash
Number Of Bits
16
Package Type
100-pin TQFP
Programmable Memory
256K Bytes
Ram Size
98K Bytes
Speed
32 MHz
Temperature Range
–40 to 85 °C
Timers
5-16-bit
Voltage, Range
2.2-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ256GB210-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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4.3.3
The upper 32 Kbytes of data space may optionally be
mapped into any 16K word page of the program space.
This provides transparent access of stored constant
data from the data space without the need to use
special instructions (i.e., TBLRDL/H).
Program space access through the data space occurs
when the MSb of EA is ‘1’ and the DSRPAG<9> is also
‘1’. The lower 8 bits of DSRPAG are concatenated to the
Wn<14:0> bits to form a 23-bit EA to access program
memory. The DSRPAG<8> decides which word should
be addressed; when the bit is ‘0’, the lower word and
when ‘1’, the upper word of the program memory is
accessed.
The entire program memory is divided into 512 EDS
pages, from 0x200 to 0x3FF, each consisting of 16K
words of data. Pages, 0x200 to 0x2FF, correspond to
the lower words of the program memory, while 0x300 to
0x3FF correspond to the upper words of the program
memory.
Using this EDS technique, the entire program memory
can be accessed. Previously, the access to the upper
word of the program memory was not supported.
TABLE 4-36:
2010 Microchip Technology Inc.
Note 1:
(Data Space Read Register)
DSRPAG
When the source/destination address is above 0x8000 and DSRPAG/DSWPAG is ‘0’, an address error
trap will occur.
READING DATA FROM PROGRAM
MEMORY USING EDS
0x200
0x2FF
0x300
0x3FF
0x000
•
•
•
•
•
•
EDS PROGRAM ADDRESS WITH DIFFERENT PAGES AND ADDRESSES
0x8000 to 0xFFFF
Source Address
while Indirect
Addressing
PIC24FJ256GB210 FAMILY
23-Bit EA Pointing to EDS
0x7F8000 to 0x7FFFFE
0x7F8001 to 0x7FFFFF
0x000000 to 0x007FFE
0x000001 to 0x007FFF
Table 4-36 provides the corresponding 23-bit EDS
address for program memory with EDS page and
source addresses.
For operations that use PSV and are executed outside
a REPEAT loop, the MOV and MOV.D instructions will
require one instruction cycle in addition to the specified
execution time. All other instructions will require two
instruction cycles in addition to the specified execution
time.
For operations that use PSV, which are executed inside
a REPEAT loop, there will be some instances that
require two instruction cycles in addition to the
specified execution time of the instruction:
• Execution in the first iteration
• Execution in the last iteration
• Execution prior to exiting the loop due to an
• Execution upon re-entering the loop after an
Any other iteration of the REPEAT loop will allow the
instruction accessing data, using PSV, to execute in a
single cycle.
Invalid Address
interrupt
interrupt is serviced
•
•
•
•
•
•
Lower words of 4M
program instructions
(8 Mbytes) for read
operations only.
Upper words of 4M
program instructions
(4 Mbytes remaining,
4 Mbytes are phantom
bytes) for read
operations only.
Address error trap
Comment
DS39975A-page 75
(1)
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