PIC24FJ256GB210-I/PT Microchip Technology Inc., PIC24FJ256GB210-I/PT Datasheet - Page 248

• Manufacturer Part Number: PIC24FJ256GB210-I/PT
• Description: 100 TQFP 12x12x1mm TRAY, 16-bit, 256KB Flash, 96K RAM, USB
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24FJ256GB210-I/PT

• A/d Inputs: 24 Channel, 10-bit
• Comparators: 3
• Cpu Speed: 16 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 84
• Interface: I2C/SPI/UART/USART/USB
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 100-pin TQFP
• Programmable Memory: 256K Bytes
• Ram Size: 98K Bytes
• Speed: 32 MHz
• Temperature Range: –40 to 85 °C
• Timers: 5-16-bit
• Voltage, Range: 2.2-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part

PIC24FJ256GB210 FAMILY
18.6.2
In USB OTG applications, a Dual Role Device (DRD) is
a device that is capable of being either a host or a
peripheral. Any OTG DRD must support Host
Negotiation Protocol (HNP).
HNP allows an OTG B-device to temporarily become
the USB host. The A-device must first enable the
B-device to follow HNP. Refer to the “On-The-Go
Supplement” to the “USB 2.0 Specification” for more
information regarding HNP. HNP may only be initiated
at full speed.
After being enabled for HNP by the A-device, the
B-device requests being the host any time that the USB
link is in suspend state, by simply indicating a discon-
nect. This can be done in software by clearing
DPPULUP and DMPULUP. When the A-device detects
the disconnect condition (via the URSTIF (U1IR<0>)
interrupt), the A-device may allow the B-device to take
over as host. The A-device does this by signaling con-
nect as a full-speed function. Software may accomplish
this by setting DPPULUP.
If the A-device responds instead with resume signaling,
the A-device remains as host. When the B-device
detects
(U1IR<6>), the B-device becomes host. The B-device
drives Reset signaling prior to using the bus.
TABLE 18-3:
DS39975A-page 248
If UVCMPSEL = 0
If UVCMPSEL = 1
V
V
CMPST
BUSVLD
0
1
0
1
0
0
0
1
the
HOST NEGOTIATION PROTOCOL
(HNP)
1
connect
EXTERNAL V
SESSVLD
V
CMPST
condition
0
0
1
1
0
0
1
1
2
BUS
(via
COMPARATOR STATES
SESSEND
ATTACHIF
1
0
0
0
VB_SESS_END < V
VA_SESS_VLD < V
When the B-device has finished in its role as host, it
stops all bus activity and turns on its D+ pull-up resistor
by setting DPPULUP. When the A-device detects a
suspend condition (Idle for 3 ms), the A-device turns off
its D+ pull-up. The A-device may also power-down the
V
detects the connect condition (via ATTACHIF), the
A-device resumes host operation and drives Reset
signaling.
18.6.3
The external V
ting the UVCMPDIS bit (U1CNFG2<1>). This disables
the internal V
attach V
The external comparator interface uses either the
V
SESSVLD and SESSEND pins, based upon the setting
of the UVCMPSEL bit (U1CNFG2<5>). These pins are
digital inputs and should be set in the following patterns
(see Table 18-3), based on the current level of the V
voltage.
V
BUS
CMPST
VB_SESS_END < V
VA_SESS_VLD < V
BUS
V
BUS
supply to end the session. When the A-device
Bus Condition
< VB_SESS_END
1 and V
BUS
> VBUS_VLD
V
EXTERNAL V
BUS
BUS
to the microcontroller’s V
BUS
V
BUS
BUS
BUS
Bus Condition
< VA_VBUS_VLD
< VB_SESS_END
< VA_SESS_VLD
comparators, removing the need to
comparator option is enabled by set-
CMPST
> VBUS_VLD
BUS
BUS
 2010 Microchip Technology Inc.
2 pins, or the V
< VA_VBUS_VLD
< VA_SESS_VLD
BUS
COMPARATORS
BUS
pin.
BUSVLD
BUS
,