PIC24FJ256GB210-I/PT Microchip Technology Inc., PIC24FJ256GB210-I/PT Datasheet - Page 22
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC24FJ256GB210-I/PT
Manufacturer Part Number
PIC24FJ256GB210-I/PT
Description
100 TQFP 12x12x1mm TRAY, 16-bit, 256KB Flash, 96K RAM, USB
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC24FJ256GB206-IPT.pdf
(386 pages)
Specifications of PIC24FJ256GB210-I/PT
A/d Inputs
24 Channel, 10-bit
Comparators
3
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
84
Interface
I2C/SPI/UART/USART/USB
Memory Type
Flash
Number Of Bits
16
Package Type
100-pin TQFP
Programmable Memory
256K Bytes
Ram Size
98K Bytes
Speed
32 MHz
Temperature Range
–40 to 85 °C
Timers
5-16-bit
Voltage, Range
2.2-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ256GB210-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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- Download datasheet (4Mb)
PIC24FJ256GB210 FAMILY
TABLE 1-3:
DS39975A-page 22
CN40
CN41
CN42
CN43
CN44
CN45
CN46
CN47
CN48
CN49
CN50
CN51
CN52
CN53
CN54
CN55
CN56
CN57
CN58
CN59
CN60
CN61
CN62
CN63
CN64
CN65
CN66
CN67
CN68
CN69
CN70
CN71
CN73
CN74
CN75
CN76
CN77
CN78
CN79
CN80
Legend:
Note 1:
Function
2:
3:
4:
TTL = TTL input buffer
ANA = Analog level input/output
The alternate EPMP pins are selected when the ALTPMP (CW3<12>) bit is programmed to ‘0’.
The PMSC2 signal will replace the PMA15 signal on the 15-pin PMA when CSF<1:0> = 01 or 10.
The PMCS1 signal will replace the PMA14 signal on the 14-pin PMA when CSF<1:0> = 10.
The alternate V
TQFP/QFN
64-Pin
46
49
50
51
42
43
44
45
60
61
62
63
64
58
59
33
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1
2
3
PIC24FJ256GB210 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Pin Number
REF
100-Pin
TQFP
pins selected when the ALTVREF (CW1<5>) bit is programmed to ‘0’.
100
92
28
29
66
67
72
76
77
78
68
69
70
71
79
93
94
98
99
18
19
87
88
52
51
54
53
40
39
90
89
96
97
6
7
8
9
3
4
5
121-Pin
BGA
E11
A11
A10
E10
D11
C11
K11
K10
J10
B5
K3
E8
D1
E4
E2
E1
D9
B9
E9
A9
A4
B4
B3
A2
A1
D3
C1
D2
G1
G2
B6
A6
H8
K6
A5
E6
C3
A3
L2
L6
I/O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Buffer
Input
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST = Schmitt Trigger input buffer
I
2
C™ = I
Interrupt-on-Change Inputs.
2
C/SMBus input buffer
Description
2010 Microchip Technology Inc.
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