PIC16F690-E/P Microchip Technology Inc., PIC16F690-E/P Datasheet - Page 213

• Manufacturer Part Number: PIC16F690-E/P
• Description: 20 PIN, 7 KB FLASH, 256 RAM, 18 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F690-E/P

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 7 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 18
• Interface: USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 20-pin PDIP
• Programmable Memory: 7K Bytes
• Ram Size: 256 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

FIGURE 14-10:
14.7
If
programmed, the on-chip program memory can be
read out using ICSP
14.8
Four memory locations (2000h-2003h) are designated
as ID locations where the user can store checksum or
other code identification numbers. These locations are
not accessible during normal execution but are
readable and writable during Program/Verify mode.
Only the Least Significant 7 bits of the ID locations are
used.
14.9
The PIC16F631/677/685/687/689/690 microcontrollers
can be serially programmed while in the end applica-
tion circuit. This is simply done with two lines for clock
and data and three other lines for:
• power
• ground
• programming voltage
© 2006 Microchip Technology Inc.
Instruction Flow
(INTCON<1>)
(INTCON<7>)
Note:
INTF flag
GIE bit
Instruction
Fetched
Instruction
Executed
the
CLKOUT
Note 1:
INT pin
OSC1
Code Protection
ID Locations
In-Circuit Serial Programming
code
PC
2:
3:
4:
(4)
The entire data EEPROM and Flash
program memory will be erased when the
code protection is switched from on to off.
See the “PIC12F6XX/16F6XX Memory
Programming Specification” (DS41204)
for more information.
XT, HS or LP Oscillator mode assumed.
T
GIE = 1 assumed. In this case after wake-up, the processor jumps to 0004h. If GIE = 0, execution will continue in-line.
CLKOUT is not available in XT, HS, LP or EC Oscillator modes, but shown here for timing reference.
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1
Inst(PC) = Sleep
OST
protection
Inst(PC – 1)
= 1024 T
PC
™
WAKE-UP FROM SLEEP THROUGH INTERRUPT
for verification purposes.
OSC
(drawing not to scale). This delay does not apply to EC and RC Oscillator modes.
bit(s)
Inst(PC + 1)
Sleep
PC + 1
PIC16F631/677/685/687/689/690
have
Processor in
not
Sleep
PC + 2
been
Preliminary
T
OST (2)
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Interrupt Latency
Inst(PC + 2)
Inst(PC + 1)
This allows customers to manufacture boards with
unprogrammed devices and then program the micro-
controller just before shipping the product. This also
allows the most recent firmware or a custom firmware
to be programmed.
The device is placed into a Program/Verify mode by
holding the RA0/AN0/C1IN+/ICSPDAT/ULPWU and
RA1/AN1/C12IN-/V
ing the MCLR (V
“PIC12F6XX/16F6XX Memory Programming Specifi-
cation” (DS41204) for more information. RA0 becomes
the programming data and RA1 becomes the
programming clock. Both RA0 and RA1 are Schmitt
Trigger inputs in this mode.
After Reset, to place the device into Program/Verify
mode, the Program Counter (PC) is at location 00h. A
6-bit command is then supplied to the device.
Depending on the command, 14 bits of program data
are then supplied to or from the device, depending on
whether the command was a load or a read. For
complete details of serial programming, please refer to
the
Specification” (DS41204).
A typical In-Circuit Serial Programming connection is
shown in Figure 14-11.
PC + 2
“PIC12F6XX/16F6XX
(3)
Dummy Cycle
PC + 2
PP
REF
) pin from V
/ICSPCLK pins low, while rais-
Dummy Cycle
Inst(0004h)
0004h
Memory
IL
DS41262C-page 211
to V
Inst(0005h)
Inst(0004h)
Programming
IHH
0005h
. See the