PIC16F690-E/P Microchip Technology Inc., PIC16F690-E/P Datasheet - Page 135
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PIC16F690-E/P
Manufacturer Part Number
PIC16F690-E/P
Description
20 PIN, 7 KB FLASH, 256 RAM, 18 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F690-EP.pdf
(294 pages)
Specifications of PIC16F690-E/P
A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
7 MIPS
Eeprom Memory
256 Bytes
Input Output
18
Interface
USART
Memory Type
Flash
Number Of Bits
8
Package Type
20-pin PDIP
Programmable Memory
7K Bytes
Ram Size
256 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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11.4
The Enhanced PWM Mode can generate a PWM signal
on up to four different output pins with up to 10-bits of
resolution. It can do this through four different PWM
Output modes:
• Single PWM
• Half-Bridge PWM
• Full-Bridge PWM, Forward mode
• Full-Bridge PWM, Reverse mode
To select an Enhanced PWM mode, the P1M bits of the
CCP1CON register must be set appropriately.
FIGURE 11-5:
TABLE 11-4:
© 2006 Microchip Technology Inc.
ECCP Mode
Single
Half-Bridge
Full-Bridge, Forward
Full-Bridge, Reverse
Note 1:
Note 1: The TRIS register value for each PWM output must be configured appropriately.
CCPR1H (Slave)
Duty Cycle Registers
Note 1:
Comparator
2: Clearing the CCP1CON register will relinquish ECCP control of all PWM output pins.
3: Any pin not used by an Enhanced PWM mode is available for alternate pin functions
PWM (Enhanced Mode)
CCPR1L
PR2
TMR2
Comparator
Pulse Steering enables outputs in Single mode.
The 8-bit timer TMR2 register is concatenated with the 2-bit internal Q clock, or 2 bits of the prescaler to create the 10-bit
time base.
EXAMPLE PIN ASSIGNMENTS FOR VARIOUS PWM ENHANCED MODES
(1)
EXAMPLE SIMPLIFIED BLOCK DIAGRAM OF THE ENHANCED PWM MODE
Clear Timer2,
toggle PWM pin and
latch duty cycle
DC1B<1:0>
P1M<1:0>
00
10
01
11
PIC16F631/677/685/687/689/690
R
S
P1M<1:0>
Q
CCP1/P1A
Yes
Preliminary
Yes
Yes
Yes
(1)
PWM1CON
Controller
Output
2
CCP1/P1A
P1B
P1C
P1D
The PWM outputs are multiplexed with I/O pins and are
designated P1A, P1B, P1C and P1D. The polarity of the
PWM pins is configurable and is selected by setting the
CCP1M bits in the CCP1CON register appropriately.
Table 11-4 shows the pin assignments for each
Enhanced PWM mode.
Figure 11-5 shows an example of a simplified block
diagram of the Enhanced PWM module.
CCP1M<3:0>
4
Note:
Yes
P1B
Yes
Yes
Yes
TRIS
TRIS
TRIS
TRIS
(1)
To
incomplete waveform when the PWM is
first enabled, the ECCP module waits until
the start of a new PWM period before
generating a PWM signal.
prevent
Yes
P1C
Yes
Yes
No
the
(1)
CCP1/P1A
P1B
P1D
P1C
generation
DS41262C-page 133
Yes
P1D
Yes
Yes
No
(1)
of
an
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