PIC16F690-E/P Microchip Technology Inc., PIC16F690-E/P Datasheet - Page 200

• Manufacturer Part Number: PIC16F690-E/P
• Description: 20 PIN, 7 KB FLASH, 256 RAM, 18 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F690-E/P

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 7 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 18
• Interface: USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 20-pin PDIP
• Programmable Memory: 7K Bytes
• Ram Size: 256 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F631/677/685/687/689/690
14.2.4
The BOREN0 and BOREN1 bits in the Configuration
Word register select one of four BOR modes. Two
modes have been added to allow software or hardware
control of the BOR enable. When BOREN<1:0> = 01,
the SBOREN bit (PCON<4>) enables/disables the
BOR allowing it to be controlled in software. By
selecting BOREN<1:0>, the BOR is automatically
disabled in Sleep to conserve power and enabled on
wake-up. In this mode, the SBOREN bit is disabled.
See
definition.
If V
(T
the Brown-out situation will reset the device. This will
occur regardless of V
to occur if V
(T
FIGURE 14-3:
DS41262C-page 198
BOR
BOR
DD
) (see Section 17.0 “Electrical Specifications”),
).
Register 14-2
Note 1: 64 ms delay only if PWRTE bit is programmed to ‘0’.
falls below V
DD
BROWN-OUT RESET (BOR)
falls below V
Internal
Internal
Internal
Reset
Reset
Reset
V
V
V
DD
DD
DD
DD
BOR
for
BROWN-OUT SITUATIONS
slew rate. A Reset is not insured
for greater than parameter
BOR
the
for less than parameter
Configuration
Word
Preliminary
< 64 ms
64 ms
On any Reset (Power-on, Brown-out Reset, Watchdog
Timer, etc.), the chip will remain in Reset until V
above V
will now be invoked, if enabled and will keep the chip in
Reset an additional 64 ms.
If V
running, the chip will go back into a Brown-out Reset
and the Power-up Timer will be re-initialized. Once V
rises above V
64 ms Reset.
(1)
Note:
64 ms
64 ms
DD
drops below V
(1)
BOR
(1)
The Power-up Timer is enabled by the
PWRTE bit in the Configuration Word
register.
(see Figure 14-3). The Power-up Timer
BOR
, the Power-up Timer will execute a
BOR
© 2006 Microchip Technology Inc.
while the Power-up Timer is
V
V
V
BOR
BOR
BOR
DD
rises
DD