PIC16F690-E/P Microchip Technology Inc., PIC16F690-E/P Datasheet - Page 109

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PIC16F690-E/P

Manufacturer Part Number
PIC16F690-E/P
Description
20 PIN, 7 KB FLASH, 256 RAM, 18 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F690-E/P

A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
7 MIPS
Eeprom Memory
256 Bytes
Input Output
18
Interface
USART
Memory Type
Flash
Number Of Bits
8
Package Type
20-pin PDIP
Programmable Memory
7K Bytes
Ram Size
256 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
9.0
The
conversion of an analog input signal to a 10-bit binary
representation of that signal. This device uses analog
inputs, which are multiplexed into a single sample and
hold circuit. The output of the sample and hold is
connected to the input of the converter. The converter
generates a 10-bit binary result via successive
approximation and stores the conversion result into the
ADC result registers (ADRESL and ADRESH).
The ADC voltage reference is software selectable to
either V
pins.
The ADC can generate an interrupt upon completion of
a conversion. This interrupt can be used to wake-up the
device from Sleep.
FIGURE 9-1:
© 2006 Microchip Technology Inc.
Note:
Analog-to-Digital
DD
ANALOG-TO-DIGITAL
CONVERTER (ADC) MODULE
RA0/AN0/C1IN+/ICSPDAT/ULPWU
Note 1:
RA1/AN1/C12IN0-/V
or a voltage applied to the external reference
The ADC module applies to PIC16F677/
PIC16F685/PIC16F687/PIC16F689/
PIC16F690 devices only.
RA4/AN3/T1G/OSC2/CLKOUT
RA2/AN2/T0CKI/INT/C1OUT
2:
3:
RC2/AN6/C12IN2-/P1D
RC3/AN7/C12IN3-/P1C
RB4/AN10/SDI/SDA
P1C and P1D available on PIC16F685/PIC16F690 only.
SS, SDO, SDA, RX and DT available on PIC16F677/PIC16F687/PIC16F689/PIC16F690 only.
ADC module applies to the PIC16F677/PIC16F685/PIC16F687/PIC16F689/PIC16F690 devices only.
ADC BLOCK DIAGRAM
RB5/AN11/RX/DT
RC1/AN5/C12IN1-
RC7/AN9/SDO
Converter
RC0/AN4/C2IN+
RC6/AN8/SS
VP6 Reference
REF
/ICSPCLK
CV
PIC16F631/677/685/687/689/690
REF
(ADC)
(1)
(1)
(2)
(2)
(2)
(2)
CHS
allows
V
REF
Preliminary
V
DD
GO/DONE
Figure 9-1 shows the block diagram of the ADC.
VCFG = 0
VCFG = 1
ADON
V
SS
ADC
ADFM
ADRESH ADRESL
0 = Left Justify
1 = Right Justify
DS41262C-page 107
10
10

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