DP83905AVQB National Semiconductor, DP83905AVQB Datasheet - Page 20

IC CONTROLR AT/LAN TP IN 160PQFP

DP83905AVQB

Manufacturer Part Number
DP83905AVQB
Description
IC CONTROLR AT/LAN TP IN 160PQFP
Manufacturer
National Semiconductor
Series
AT/LANTIC™r
Datasheet

Specifications of DP83905AVQB

Controller Type
AT, LAN Twisted-Pair Interface Controller
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
100mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
160-BFQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Interface
-
Other names
*DP83905AVQB

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DP83905AVQB
Manufacturer:
NS
Quantity:
2
Part Number:
DP83905AVQB
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
DP83905AVQB
Manufacturer:
NS
Quantity:
63
Part Number:
DP83905AVQB
Manufacturer:
NS/国半
Quantity:
20 000
4 0 Functional Description
The signal at the start of packet is checked by the smart
squelch and any pulses not exceeding the squelch level
(either positive or negative depending upon polarity) will be
rejected Once this first squelch level is overcome correctly
the opposite squelch level must then be exceeded within
150 ns later Finally the signal must exceed the original
squelch level within a further 150 ns to ensure that the input
waveform will not be rejected The checking procedure re-
sults in the loss of typically three bits at the beginning of
each packet
Only after all these conditions have been satisfied will a
control signal be generated to indicate to the remainder of
the circuitry that valid data is present At this time the smart
squelch circuitry is reset
In the reduced squelch mode the operation is identical ex-
cept that the lower squelch levels shown in Figure 14 are
used
Valid data is considered to be present until either squelch
level has not been generated for a time longer than 150 ns
indicating End of Packet Once good data has been detect-
ed the squelch levels are reduced to minimize the effect of
noise causing premature End of Packet detection
Collision
A collision is detected by the TPI module when the receive
and transmit channels are active simultaneously If the TPI
is receiving when a collision is detected it is reported to the
controller immediately If however the TPI is transmitting
when a collision is detected the collision is not reported until
seven bits have been received while in the collision state
This prevents a collision being reported incorrectly due to
noise on the network The signal to the controller remains
for the duration of the collision
Approximately 1 s after the transmission of each packet a
signal called the Signal Quality Error (SQE) consisting of
typically 10 cycles of 10 MHz is generated This 10 MHz
signal also called the Heartbeat ensures the continued
functioning of the collision circuitry
FIGURE 14 Twisted Pair Squelch Waveform
(Continued)
20
Link Detector Generator
The link generator is a timer circuit that generates a link
pulse as defined by the 10 Base-T specification that will be
generated by the transmitter section The pulse which is
100 ns wide is transmitted on the TXO
16 ms in the absence of transmit data
The pulse is used to check the integrity of the connection to
the remote MAU The link detection circuit checks for valid
pulses from the remote MAU and if valid link pulses are not
received the link detector will disable the transmit receive
and collision detection functions
The GDLNK output can directly drive a LED to show that
there is a good twisted pair link For normal conditions the
LED will be on The link integrity function can be disabled by
setting the GDLNK bit of Configuration Register B
Jabber
The jabber timer monitors the transmitter and disables the
transmission if the transmitter is active for greater than
26 ms The transmitter is then disabled for the whole time
that the Endec module’s internal transmit enable is assert-
ed This signal has to be deasserted for approximately
750 ms (the unjab time) before the Jabber re-enables the
transmit outputs
Transmitter
The transmitter consists of four signals the true and compli-
ment Manchester encoded data (TXO
delayed by 50 ns (TXOd
These four signals are resistively combined TXO
TXOd
pre-emphasis and is required to compensate for the twisted
pair cable which acts like a low pass filter causing greater
attenuation to the 10 MHz (50 ns) pulses of the Manchester
encoded waveform than the 5 MHz (100 ns) pulses
An example of how these siqnals are combined is shown in
the following diagram
b
and TXO
b
with TXOd
g
)
a
This is known as digital
g
) and these signals
a
output every
TL F 11498 – 11
a
with

Related parts for DP83905AVQB