DP83905AVQB National Semiconductor, DP83905AVQB Datasheet - Page 2

• Manufacturer Part Number: DP83905AVQB
• Description: IC CONTROLR AT/LAN TP IN 160PQFP
• Manufacturer: National Semiconductor
• Series: AT/LANTIC™r

Specifications of DP83905AVQB

• Controller Type: AT, LAN Twisted-Pair Interface Controller
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 100mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-BFQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Interface: -
• Other names: *DP83905AVQB

General Description
The integrated ENDEC module allows Manchester encod-
ing and decoding via a differential transceiver and phase
lock Ioop decoder at 10 Mbit sec Also included are a colli-
sion detect translator and diagnostic loopback capability
The ENDEC module interfaces directly to the transceiver
module and also provides a fully IEEE compliant AUI (At-
tachment Unit Interface) for connection to other media
transceivers
1 0 SYSTEM DIAGRAM
2 0 PIN DESCRIPTION
3 0 SIMPLIFIED APPLICATION DIAGRAM
4 0 FUNCTIONAL DESCRIPTION
1 1 Connection Diagram
4 1 Bus Interface Block
4 2 Power on RESET operation
4 3 EEPROM Operation
4 4 Jumpered and Jumperless Operation Support
4 5 Low Power Operation
4 6 Boot PROM Operation
4 7 DP8390 Core (Network Interface Controller)
4 8 Twisted Pair Interface Module
4 9 Encoder Decoder (ENDEC) Module
(Continued)
Table of Contents
2
The Media Access Control function which is provided by the
Network Interface Control module (NIC) provides simple
and efficient packet transmission and reception control by
means of off-board memory which can be accessed either
through an I O port or mapped into the system memory
AT LANTIC Controller provides a comprehensive solution
for 10BASE-T IEEE 802 3 networks Due to the inherent
constraints of CMOS processing isolation is required at the
AUI differential signal interface for 10BASE5 and 10BASE2
applications
5 0 REGISTER DESCRIPTIONS
6 0 OPERATION OF AT LANTIC CONTROLLER
7 0 PRELIMINARY ELECTRICAL CHARACTERISTICS
8 0 PRELIMINARY SWITCHING CHARACTERISTICS
9 0 AC TIMING TEST CONDITIONS
5 1 Configuration Registers
5 2 Shared Memory Mode Control Registers
5 3 NIC Core Registers
5 4 DP8390 Core DMA Registers
6 1 Transmit Receive Packet Encapsulation
6 2 Buffer Memory Access Control (DMA)
6 3 Packet Reception
6 4 Packet Transmission
6 5 Loopback Diagnostics
6 6 Memory Arbitration and Bus Operation
6 7 Functional Bus Timing
Decapsulation