TDA8007BHL/C3,118 NXP Semiconductors, TDA8007BHL/C3,118 Datasheet - Page 27

• Manufacturer Part Number: TDA8007BHL/C3,118
• Description: IC INTERFACE CARD MP 48-LQFP
• Manufacturer: NXP Semiconductors

Specifications of TDA8007BHL/C3,118

• Controller Type: Multiprotocol IC Card Interface
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 6 V
• Current - Supply: 315mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-3520-2; 935272525118; TDA8007BHLBE-T

NXP Semiconductors
TDA8007BHL
Product data sheet
8.2.3.5 Clock Configuration Registers (CCR)
Table 27.
The clock configuration registers CCR1, CCR2 and CCR3 relate the clock signals:
Table 28.
[1]
Table 29.
Bit
7
6
5
4
3
2
1
0
CC7
Bit
7
6
5
•
•
For cards 1 and 2, register CCRx defines the clock for the selected card
For cards 1, 2 and 3, register CCRx defines the clock to the ISO UART. It should be
noted that, if bit CKU in the prescaler register of the selected card (register UCR2) is
set, then the ISO UART is clocked at twice the frequency of the card, which allows
baud rates not foreseen in ISO 7816 norm to be reached.
Register value at reset: all bits are cleared after reset.
7
Symbol
UC17
FIP
FC
PROT
T/R
LCT
SS
CONV
Description of UCRx1 bits
Register CCR1, CCR2 and CCR3 (address 01H; read and write)
Description of CCRx bits
6
CC6
Symbol
CC7
CC6
SHL
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 11 January 2011
5
SHL
Description
not used
Force Inverse Parity (FIP). If bit FIP is set to logic 1, the UART will
NAK a correctly received character, and will transmit characters with
wrong parity bits.
Test. Bit FC is a test bit, and must be left at logic 0.
Protocol (PROT). Bit PROT is set if the protocol is T = 1
(asynchronous) and bit PROT = 0 if the protocol is T = 0.
Transmit/Receive (T/R). Bit T/R is set by software for transmission
mode. A change from logic 0 to 1 will set bit TBE in register USR.
Bit T/R is automatically reset by hardware if bit LCT has been used
before transmitting the last character.
Last Character to Transmit (LCT). Bit LCT is set by software before
writing the last character to be transmitted in the UTR. It allows
automatic change to reception mode. It is reset by hardware at the end
of a successful transmission. When LCT is being reset, the bit T/R is
also reset and the ISO 7816 UART is ready for receiving a character.
Software convention Setting (SS). Bit SS is set by software before
ATR for automatic convention detection and early answer detection. It
is automatically reset by hardware at 10.5 ETU after reception of the
initial character.
Convention (CONV). Bit CONV is set if the convention is direct.
Bit CONV is either automatically written by hardware according to the
convention detected during ATR, or by software if the bit AUTOCONV
in register UCR2X is set.
Description
not used
not used
Stop High or Low (SHL). If bit CST = 1, then the clock is
stopped at low level if bit SHL = 0, and at high level if
bit SHL = 1.
4
GST
3
SC
2
AC2
Multiprotocol IC card interface
TDA8007BHL
1
AC1
© NXP B.V. 2011. All rights reserved.
[1]
0
AC0
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