AD1980JSTZ Analog Devices Inc, AD1980JSTZ Datasheet - Page 4

• Manufacturer Part Number: AD1980JSTZ
• Description: IC CODEC STEREO 6-DAC 20B 48LQFP
• Manufacturer: Analog Devices Inc
• Series: SoundMAX®r
• Type: Audio Codec '97r

Specifications of AD1980JSTZ

• Data Interface: Serial
• Resolution (bits): 16, 20 b
• Number Of Adcs / Dacs: 2 / 6
• Sigma Delta: No
• Dynamic Range, Adcs / Dacs (db) Typ: 82 / 90
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.15 V ~ 3.45 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 3.15/4.75V
• Single Supply Voltage (max): 3.45/5.25V
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD1980
Parameter
POWER-DOWN STATES
NOTES
1
2
Specifications subject to change without notice.
Parameter
CLOCK SPECIFICATIONS
*
Specifications subject to change without notice.
TIMING PARAMETERS
Parameter
RESET Active Low Pulsewidth
RESET Inactive to BIT_CLK Startup Delay
SYNC Active High Pulsewidth
SYNC Low Pulsewidth
SYNC Inactive to BIT_CLK Startup Delay
BIT_CLK Frequency
BIT_CLK Frequency Accuracy
BIT_CLK Period
BIT_CLK Output Jitter
BIT_CLK High Pulsewidth
BIT_CLK Low Pulsewidth
SYNC Frequency
SYNC Period
Setup to Falling Edge of BIT_CLK
Hold from Falling Edge of BIT_CLK
BIT_CLK Rise Time
BIT_CLK Fall Time
SYNC Rise Time
SYNC Fall Time
SDATA_IN Rise Time
SDATA_IN Fall Time
SDATA_OUT Rise Time
SDATA_OUT Fall Time
End of Slot 2 to BIT_CLK, SDATA_IN Low
Setup to RESET Inactive (SYNC, SDATA_OUT)
Rising Edge of RESET to Hi-Z Delay
Propagation Delay
RESET Rise Time
Output Valid Delay from BIT_CLK Rising
NOTES
1
2
Specifications subject to change without notice.
PR bits are controlled in Reg. 2Ah and 26h
Values presented with V
Guaranteed but not tested.
Guaranteed but not tested.
Output jitter directly dependent on crystal input jitter.
Fully Active
ADC
FRONT DAC
SURROUND DAC
CENTER/LFE DAC
ADC + ALL DACs
Mixer
ADC + Mixer
ALL DACs + Mixer
ADC + ALL DACs + Mixer
Standby
Headphone Standby
Input Clock Frequency (XTAL Mode or Clock Oscillator)
Input Clock Frequency (Reference Clock Mode)
Input Clock Frequency (USB Clock Mode)
Recommended Clock Duty Cycle
REFOUT
1, 2
loaded.
2
*
(Guaranteed over Operating Temperature Range)
PR[K:I]
000
000
000
010
101
111
000
000
111
111
111
000
1
PR[6:0]
000 0000
000 0001
000 0010
000 0000
000 0000
000 0011
000 0100
000 0101
000 0110
000 0111
011 1111
100 0000
1
–4–
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
RST_LOW
RST2CLK
SYNC_HIGH
SYNC_LOW
SYNC2CLK
CLK_PERIOD
CLK_HIGH
CLK_LOW
SYNC_PERIOD
SETUP
HOLD
RISECLK
FALLCLK
RISESYNC
FALLSYNC
RISEDIN
FALLDIN
RISEDOUT
FALLDOUT
S2_PDOWN
SETUP2RST
OFF
Min
40
DV
53
44
46
46
46
12
52
45
31
12
0
52
DD
Typ
Typ
50
24.576
14.31818
48.000
Min
162.8
162.8
40
39.7
4
3
2
2
2
2
2
2
2
2
0
15
AV
70
66
61
61
61
33
44
39
14
8
0
65
Typ
1.0
1.3
19.5
12.288
81.4
750
48.0
20.8
4
4
4
4
4
4
4
4
DD
Max
60
Typ
Max
400,000
41.7
41.4
6
6
6
6
6
6
6
6
1.0
25
15
50
15
1.0
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Unit
MHz
MHz
MHz
%
REV. 0
Unit
µs
ns
µs
µs
ns
MHz
ppm
ns
ps
ns
ns
kHz
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns