AD1980JSTZ Analog Devices Inc, AD1980JSTZ Datasheet - Page 22

• Manufacturer Part Number: AD1980JSTZ
• Description: IC CODEC STEREO 6-DAC 20B 48LQFP
• Manufacturer: Analog Devices Inc
• Series: SoundMAX®r
• Type: Audio Codec '97r

Specifications of AD1980JSTZ

• Data Interface: Serial
• Resolution (bits): 16, 20 b
• Number Of Adcs / Dacs: 2 / 6
• Sigma Delta: No
• Dynamic Range, Adcs / Dacs (db) Typ: 82 / 90
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.15 V ~ 3.45 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 3.15/4.75V
• Single Supply Voltage (max): 3.45/5.25V
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD1980
D15/D7
0
0
0
0
1
All registers not shown and bits containing an X are assumed to be reserved.
Register 3Ah is a read/write register that controls SPDIF functionality and manages bit fields propagated as channel status (or subframe in the V case). With the
exception of V, this register should only be written to when the SPDIF transmitter is disabled (SPDIF Bit in Register 2Ah is “0”). This ensures that control and status
information starts up correctly at the beginning of SPDIF transmission.
PRO
/AUD
COPY
PRE
CC[6-0]
L
SPSR[1,0]
V
Reg
No. Name
3Ah SPDIF
Control
WRITE
00 0000
00 1111
01 1111
1x xxxx
xx xxxx
D15
Professional. “1” indicates professional use of channel status, “0” indicates consumer.
Non-Audio. “1” indicates data is non PCM format, “0” indicates data is PCM.
Copyright. “1” indicates copyright is asserted, “1” indicates copyright is not asserted.
Pre-emphasis. “1” indicates filter pre-emphasis is 50 µs/15 µs, “0” indicates pre-emphasis is none.
Category Code. Programmed according to IEC standards, or as appropriate.
Generation Level. Programmed according to IEC standards, or as appropriate.
SPDIF Transmit Sample Rate:
SPSR[1:0] = “00” Transmit Sample Rate = 44.1 kHz
SPSR[1:0] = “01” Reserved
SPSR[1:0] = “10” Transmit Sample Rate = 48 kHz (default)
SPSR[1:0] = “11” Not supported.
Validity. This bit affects the Validity flag (Bit 28 transmitted in each SPDIF L/R subframe) and enables the SPDIF
transmitter to maintain connection during error or mute conditions.
V = 1 Each SPDIF subframe (L+R) has Bit 28 set to “1.” This tags both samples as invalid.
V = 0 Each SPDIF subframe (L+R) has Bit 28 set to “0” for valid data and “1” for invalid data (error condition).
Note that when V = 0, asserting the VFORCE bit (D15) in Register 2Ah (Ext’d Audio Stat/Ctrl) will force the Va-
lidity flag low, marking both samples as valid.
V
Left Surround D[13:8]
Right Surround D[5:0]
D14
X
SPSR1
D13
READBACK
00 0000
00 1111
01 1111
01 1111
xx xxxx
D12
SPSR0
Table VIII. Settings for Surround Register
SPDIF Control Register (Index 3Ah)
D11
L
Surround Volume (38h)
D10
CC6
Function with AC97NC = 0
0 dB Gain
–22 dB Gain
–46.5 dB Gain
–46.5 dB Gain
Muted
Control Bits
D9
CC5 CC4 CC3
–22–
D8
D7
D6
CC2
D5
CC1
D4
CC0 PRE COPY /AUD PRO 2000h
Function with AC97NC = 1
12 dB Gain
–10.5 dB Gain
–34.5 dB Gain
Not Applicable
Muted
D3
D2
D1
D0
REV. 0
Default