AD1980JSTZ Analog Devices Inc, AD1980JSTZ Datasheet - Page 21

• Manufacturer Part Number: AD1980JSTZ
• Description: IC CODEC STEREO 6-DAC 20B 48LQFP
• Manufacturer: Analog Devices Inc
• Series: SoundMAX®r
• Type: Audio Codec '97r

Specifications of AD1980JSTZ

• Data Interface: Serial
• Resolution (bits): 16, 20 b
• Number Of Adcs / Dacs: 2 / 6
• Sigma Delta: No
• Dynamic Range, Adcs / Dacs (db) Typ: 82 / 90
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.15 V ~ 3.45 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 3.15/4.75V
• Single Supply Voltage (max): 3.45/5.25V
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

All registers not shown and bits containing an X are assumed to be reserved.
Refer to Table VII for examples. This register controls the LFE output volume and mute bit. The volume registers contain five bit, generating
32 volume levels with 31 steps of 1.5 dB each. If MSPLT is not set, Bit D7 has no effect.
*Because AC ’97 defines 6-bit volume registers, to maintain compatibility, whenever the D5 or D13 bit is set to “1,” its respective lower five volume bits are automati-
Note that depending on the state of the AC97NC bit in register 76h, this register operates as follows:
CNT[5:0]
CM
LFE[5:0]
LM
D15/D7
0
0
0
0
1
*Refer to Table VIII for examples. This register controls the surround volume controls for both stereo channels and mute bits. Each volume subregister contains
five bits, generating 32 volume levels with 31 steps of 1.5 dB each. Because AC ’97 defines 6-bit volume registers, to maintain compatibility, whenever the D5 or
D13 Bit is set to 1, its respective lower five volume bits are automatically set to “1” by the coded logic. On readback , all lower five bits will read “1s” whenever
these bits are set to “1.”
Note that depending on the state of the AC97NC bit in Register 0x76, this register operates as follows:
For AC97NC = 0, the register controls the surround output pin Attenuators. Range is 0 dB to –46.5 dB.
For AC97NC = 1, the register controls the surround DAC Gain/Attenuators. Range is +12 dB to –34.5 dB.
RSR[5:0]
MUTE_R
LSR[5:0]
MUTE_L
REV. 0
Reg
No. Name
36h Center/LFE LM X
cally set to “1” by the codec logic. On readback, all lower five bits will read “1”s whenever this bit is set to “1.”
Reg
No.
38h
For AC97NC = 0, the register controls the center and LFE output pin Attenuators. Range is 0 dB to –46.5 dB.
For AC97NC = 1, the register controls the center and LFE DAC Gain/Attenuators. Range is +12 dB to –34.5 dB.
Volume
Name
Surround
Volume
CENTER D[5:0] and LFE D[13:8]
WRITE
00 0000
00 1111
01 1111
1x xxxx
xx xxxx
Left Surround Volume Control
Center Volume Control
Center Volume Mute. When this bit is set to “1,” the channel is muted.
LFE Volume Control
LFE Volume Mute. When this bit is set to “1,” the channel is muted.
Right Surround Volume Control
Right Surround Volume Mute. When this bit is set to “1,” the right channel is muted.
Left Surround Volume Mute. When this bit is set to “1,” the left channel is muted.
D15 D14
D15
MUTE_L X
D14 D13* D12
D13* D12
LFE5 LFE4
LSR5 LSR4 LSR3 LSR2 LSR1 LSR0 MUTE_R X
READBACK
00 0000
00 1111
01 1111
01 1111
xx xxxx
CENTER/LFE Volume Control Register (Index 36h)
Surround Volume Control Register (Index 38h)
D11
LFE3 LFE2
Table VII. Settings for Center/LFE Register
D11
CENTER and LFE Volume (36h)
D10
D10
D9
LFE1 LFE0 CM
Function with AC97NC = 0
0 dB Gain
–22 dB Gain
–46.5 dB Gain
–46.5 dB Gain
Muted
D9
Control Bits
–21–
D8
D8
D7
D7
D6 D5*
X
D6
CNT5 CNT4 CNT3 CNT2 CNT1 CNT0 8080h
D5*
RSR5 RSR4 RSR3 RSR2
D4
D4
D3
Function with AC97NC = 1
12 dB Gain
–10.5 dB Gain
–34.5 dB Gain
Not Applicable
Muted
D3
D2
D2
D1
D1
RSR1 RSR0 8080h
AD1980
D0
D0
Default
Default