IDTSTAC9753AXNAED1XR IDT, Integrated Device Technology Inc, IDTSTAC9753AXNAED1XR Datasheet - Page 42

• Manufacturer Part Number: IDTSTAC9753AXNAED1XR
• Description: IC CODEC AC'97 MIC/JACK 32-QFN
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Audio Codec '97r

Specifications of IDTSTAC9753AXNAED1XR

• Resolution (bits): 20 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• S/n Ratio, Adcs / Dacs (db) Typ: 85 / 92
• Voltage - Supply, Analog: 3.14 V ~ 3.47 V; 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.14 V ~ 3.47 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-QFN
• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 3.135V
• Single Supply Voltage (max): 3.465/5.25V
• Package Type: VFQFPN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: STAC9753AXNAED1XR

IDT™
AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
STAC9752A/9753A
AC’97 2.3 CODECS WITH STEREO MICROPHONE & UNIVERSAL JACK
5.5.
5.4.8.
5.4.9.
5.4.10.
5.5.1.
AC-Link Interoperability Requirements and Recommendations
Slots 7-8: Vendor Reserved
The left and right ADC channels of the STAC9752A/9753A may be assigned to slots 7&8 by Regis-
ter 6Eh.
NOTE: The ADC can be assigned to slots 3&4, 6&9, 7&8, or 10&11.
Slot 10 & 11: ADC
The left and right ADC channels of the STAC9752A/9753A may be assigned to slots 10&11 by Reg-
ister 6Eh.
NOTE: The ADC can be assigned to slots 3&4, 6&9, 7&8, or 10&11.
Slot 12: Reserved
AC-Link input frame slot 12 contains the GPIO status inputs and allows for audio interrupts. Slot 12
can be used by the AC’97 CODEC is a modem CODEC is not present.
“Atomic slot” Treatment of Slot 1 Address and Slot 2 Data
Command or Status Address and Data cannot be split across multiple AC-Link frames. The following
transactions require that valid Slot 1 Address and valid Slot 2 Data be treated as “atomic” (insepara-
ble) with Slot 0 Tag bits for Address and Data set accordingly (that is, both valid):
1. AC‘97 Digital Controller write commands to Primary CODECs
2. AC‘97 CODEC status responses
Whenever the AC‘97 Digital Controller addresses a Primary CODEC or an AC‘97 CODEC responds
to a read command, Slot 0 Tag bits should always be set to indicate actual Slot 1 and Slot 2 data
validity.
AC‘97 CODEC Status Frame
Primary Read Frame N,
Primary Write Frame N,
AC‘97 Digital Controller
AC‘97 Digital Controller
N+1, SDATA_IN
SDATA_OUT
SDATA_OUT
Function
Table 11. Primary CODEC Addressing: Slot 0 Tag Bits
(Valid Frame)
Slot 0, bit 15
1
1
1
42
(Valid Slot 1 Address)
Slot 0, bit 14
1
1
1
STAC9752A/9753A
(Valid Slot 2 Data)
Slot 0, bit 13
0
1
1
Slot 0, Bits 1-0
(CODEC ID)
PC AUDIO
00
00
00
V 1.5 1206