UDA1338H/N1,518 NXP Semiconductors, UDA1338H/N1,518 Datasheet - Page 10

• Manufacturer Part Number: UDA1338H/N1,518
• Description: IC AUDIO CODER/DECODER 44QFP
• Manufacturer: NXP Semiconductors
• Type: Stereo Audior

Specifications of UDA1338H/N1,518

• Package / Case: 44-MQFP, 44-PQFP
• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 5 / 6
• Sigma Delta: No
• S/n Ratio, Adcs / Dacs (db) Typ: 100 / 114
• Voltage - Supply, Analog: 2.7 V ~ 3.6 V
• Voltage - Supply, Digital: 2.7 V ~ 3.6 V
• Operating Temperature: -20°C ~ 85°C
• Mounting Type: Surface Mount
• Product: General Purpose Audio Amplifiers
• Available Set Gain: 26 dB
• Operating Supply Voltage: 3.3 V
• Supply Current: 30 mA, 20 mA, 31 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Audio Load Resistance: 22 KOhms
• Input Signal Type: Single
• Minimum Operating Temperature: - 20 C
• Output Signal Type: Differential
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Output Type: Differential
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935268945518; UDA1338HB-T; UDA1338HB-T

NXP Semiconductors
UDA1338H
Product data sheet
Fig 4. Block diagram of DAC mixer
from ADC
DATADA1
DATADA2
DATADA3
from I
DIS [ 1:0 ]
ch1
ch2
ch3
ch4
2
S-bus
MIX [ 1:0 ]
ICS [ 1:0 ]
8.10 Power-on reset
8.9 Audio digital-to-analog converters
The audio digital-to-analog front-end of the UDA1338H consists of 6-channel differential
SDACs: an SDAC is a multi-bit DAC based upon switched resistors. To minimize data
dependent modulation effects, a Dynamic Element Matching (DEM) algorithm scrambler
circuit and DC current compensation circuit are implemented with the SDAC.
The UDA1338H has an internal power-on reset circuit which initializes the device; see
Figure
set to their default values in the L3-bus and the I
The reset time (see
between pin V
When V
During the reset time, the system clock should be running.
5. All the digital sound processing features and the system controlling features are
DDA(AD)
ref
DE-EMPHASIS
All information provided in this document is subject to legal disclaimers.
is switched off, the device will be reset again for V
and ground. The reset time should be at least 250 μs for V
mixer input
Figure
Rev. 04 — 18 May 2010
6) is determined by an external capacitor which is connected
VOLUME
VOLUME
MIXER
same as above
same as above
same as above
same as above
same as above
MIXER
MUTE
MUTE
2
C-bus modes.
1f
s
Multichannel audio coder-decoder
+
INTERPOLATION
FILTER
ref
UDA1338H
< 0.75 V.
© NXP B.V. 2010. All rights reserved.
mgw786
ref
< 1.25 V.
DAC1
DAC2
DAC3
DAC4
DAC5
DAC6
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