IP-NIOS Altera, IP-NIOS Datasheet - Page 289
IP-NIOS
Manufacturer Part Number
IP-NIOS
Description
IP NIOS II MEGACORE
Manufacturer
Altera
Type
Licenser
Specifications of IP-NIOS
Processor Type
RISC 32-Bit
Lead Free Status / RoHS Status
Not applicable / Not applicable
Features
-
Package / Case
-
Mounting Type
-
Voltage
-
Speed
-
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Chapter 8: Instruction Set Reference
Instruction Set Reference
xorhi
December 2010 Altera Corporation
Operation:
Assembler Syntax:
Example:
Description:
Exceptions:
Instruction Type:
Instruction Fields:
31
30
29
A
28
27
26
25
24
B
rB ← rA ^ (IMM16 : 0x0000)
xorhi rB, rA, IMM16
xorhi r6, r7, 100
Calculates the bitwise logical exclusive XOR of rA and (IMM16 : 0x0000) and stores the result
in rB.
None
I
A = Register index of operand rA
B = Register index of operand rB
IMM16 = 16-bit unsigned immediate value
23
22
21
bitwise logical exclusive or immediate into high halfword
20
19
18
17
16
15
IMM16
14
13
12
11
10
9
8
Nios II Processor Reference Handbook
7
6
5
4
0x3c
3
2
1
8–103
0
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